ucb1400 NXP Semiconductors, ucb1400 Datasheet - Page 17

• Manufacturer Part Number: ucb1400
• Description: Audio Codec With Touch Screen Controller And Power Management Monitor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 09611
Product data
Fig 11. AC Link power-down/power-up sequence.
SDATA_OUT
SDATA_IN
BIT_CLK
IRQOUT
SYNC
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slot 12
slot 12
8.7.1 ATE in-circuit test mode
8.7.2 Vendor-specific test mode
8.7 Test modes
TAG
TAG
POWER-DOWN FRAME
Before enabling wake-up via IRQOUT or GIEN bit, the UCB1400 must be enabled for
interrupt by setting the appropriate bits in the Positive INT Enable register (0x5E) and
Negative INT Enable register (0x60). The INT Clear/Status register (0x62) should
then be cleared of any previous interrupts before going to low-power mode.
AC ’97 Component Specification defines two test modes. One is for ATE in-circuit
test, and the other if for vendor-specific tests. The UCB1400 enters the ATE in-circuit
test mode if SDATA_OUT is sampled HIGH at the trailing edge of RESET. The
UCB1400 enters the vendor-specific test mode when coming out of reset if SYNC is
HIGH. These cases will never occur during standard operating conditions.
Regardless of the test mode, the AC ’97 Controller must issue a cold reset to resume
normal operation of the UCB1400.
When the UCB1400 is placed in the ATE test mode, its digital AC-link outputs (i.e.,
BIT_CLK and SDATA_IN) shall be driven to a high impedance state. This allows ATE
in-circuit testing of the AC ’97 Controller.
When the UCB1400 is placed in the vendor-specific test mode, the Test Control
register (Index 0x6E) determines the kind of tests to be performed.
Refer to
Write to
0x26
Data
PR4
Section 12 “Register definition”
SLEEP STATE
Rev. 02 — 21 June 2002
WAKE EVENT
for details.
Audio codec with touch screen controller
and power management monitor
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
TAG
TAG
UCB1400
NEW AUDIO FRAME
Slot 1
Slot 1
Slot 2
Slot 2
SN00251
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