mpc2107 Freescale Semiconductor, Inc, mpc2107 Datasheet - Page 16

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mpc2107

Manufacturer Part Number
mpc2107
Description
256kb And 512kb Burstramtm Secondary Cache Mod
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MPC2104 MPC2105 MPC2106 MPC2107
16
RESET FUNCTION TRUTH TABLE
NOTES:
READ FUNCTION TRUTH TABLE
WRITE FUNCTION TRUTH TABLE
NOTES:
MATCH FUNCTION TRUTH TABLE
NOTES:
TCLR
TOE
TOE
1. H = V IH , L = V IL , X = don‘t care, — = unrelated.
2. TOE is X for this table.
1. H = V IH , L = V IL , X = don‘t care, — = unrelated.
2. This table applies when RESET and PWRDN are high.
3. D OUT in this case is the same as D IN . The input data is written through to the outputs during the write operation.
1. H = V IH , L = V IL , X = don‘t care, — = unrelated.
2. M = high if TAG IN equals the memory contents at the address; M = low if TAG IN does not equal the ocntents at that address.
3. PWRDN and RESET are high for this table. OES and CLK are X.
4. This column represents the stored memory cell data for the given status bit at the selected address.
H
H
L
L
TOE
L
L
X
H
H
H
L
TWE
TWE
L – H
L – H
H
X
CLK
L
L
TWE
X
H
H
H
L
L – H
L – H
CLK
CLK
TWE
X
X
H
L
TAG IN
TAG IN
High–Z
D OUT
D OUT
TAG
TAG
TAG
D IN
High–Z
D IN
TAG
VLD in
VLD in
VLD out
VLD (4)
(See Notes 1, 2, and 3)
(See Notes 1 and 2)
D IN
(See Notes 1 and 2)
L (3)
(See Notes 1 through 4)
H
L
DTY in
DTY in
DTY out
DTY (4)
L (3)
D IN
WT in
WT in
WT out
L (3)
WT (4)
TAG RAM
D IN
VLD out
VLD out
D OUT
MATCH
L (3)
MATCH
D OUT
DTY out
DTY out
D OUT
M
L
L
L
High–Z
TA
WT out
WT out
D OUT
Invalid Data – Dedicated Status Bits
Reset Status
Not Allowed
Match – Dedicated Status Bits
Operation
MATCH
MATCH
Write Tag I/O, Status Bits
D OUT
L
Read Tag I/O
MOTOROLA FAST SRAM
Operation
Selected
Tag I/O Disable
Read Tag I/O
Write Tag I/O
Not Allowed
Operation
Operation
POWER
Active

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