mpc2107 Freescale Semiconductor, Inc, mpc2107 Datasheet - Page 15

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mpc2107

Manufacturer Part Number
mpc2107
Description
256kb And 512kb Burstramtm Secondary Cache Mod
Manufacturer
Freescale Semiconductor, Inc
Datasheet
ASYNCHRONOUS DATA RAMs WRITE CYCLE 2
NOTES:
W (WRITE ENABLE)
MOTOROLA FAST SRAM
Write Cycle Time
Address Setup Time
Address Valid to End of Write
Enable to End of Write
Data Valid to End of Write
Data Hold Time
Write Recovery Time
E (CHIP ENABLE)
1. A write occurs during the overlap of E low and W low.
2. All timings are referenced from the last valid address to the first transitioning address.
3. If E goes low coincident with or after W goes low, the output will remain in a high impedance state.
4. If E goes high coincident with or before W goes high, the output will remain in a high impedance state.
Q (DATA OUT)
A (ADDRESS)
D (DATA IN)
Parameter
ASYNCHRONOUS WRITE CYCLE 2 (E Controlled, See Note 1)
(E Controlled, See Notes 1 and 2)
t AVEL
HIGH–Z
t AVEH
Symbol
t ELWH
t DVEH
t EHDX
t AVEH
t ELEH
t EHAX
t AVAV
t AVEL
t AVAV
t WLEH
MPC2104 MPC2105 MPC2106 MPC2107
Min
t ELEH
t ELWH
15
12
10
0
7
0
0
MPC2107–15
DATA VALID
t DVEH
Max
Unit
ns
ns
ns
ns
ns
ns
ns
t EHDX
t EHAX
Notes
3, 4
0
15

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