dp83932c-20 National Semiconductor Corporation, dp83932c-20 Datasheet - Page 68
dp83932c-20
Manufacturer Part Number
dp83932c-20
Description
Mhz Sonictm Systems-oriented Network Interface Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83932C-20.pdf
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5 0 Bus Interface
13 Latched Ready Mode is disabled (DCR2)
14 PCOMP will not be asserted (DCR2)
15 Packets will be accepted (not rejected) on CAM match
A software reset immediately terminates DMA operations
and future interrupts The chip is put into an idle state where
registers can be accessed but the SONIC will not be active
in any other way The registers are affected by a software
reset as shown in Table 5-4 (only the Command Register is
changed)
6 0 Network Interfacing
The SONIC contains an on-chip ENDEC that performs the
network interfacing between the AUI (Attachment Unit Inter-
face) and the SONIC’s MAC unit A pin selectable option
allows the internal ENDEC to be disabled and the MAC
(DCR2)
(Continued)
FIGURE 6-1 MAC and Internal ENDEC Interface Signals
68
ENDEC signals to be supplied to the user for connection to
an external ENDEC If the EXT pin is tied to ground
(EXT
to V
Internal ENDEC
(EXT
MAC unit are internally connected While these signals are
used internally by the SONIC they are also provided as an
output to the user (Figure 6-1 )
The internal ENDEC allows for a 2-chip solution for the
complete Ethernet interface Figure 6-2 shows a typical dia-
gram of the network interface
CC
e
e
0) the internal ENDEC is selected and if EXT is tied
0) the interface signals between the ENDEC and
(EXT
e
1) the external ENDEC option is selected
When the internal ENDEC is used
TL F 10492 – 52
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