gc80c590ae CORERIVER Semiconductor, gc80c590ae Datasheet - Page 125

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gc80c590ae

Manufacturer Part Number
gc80c590ae
Description
Flash / Isp / Iap 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
STATUS
OSCICN
IOCFG
Appendix B :
-
-
-
XTUP
RINGON : Internal RING oscillator operates.
DIV1, DIV0 : Ring oscillator divider.
ENAUX
PKGOPT : Must be “1” for 44-pin package.
(C7h) : I/O Configuration Register
-
-
-
(C5h) : Crystal Status Register
(C6h) : Internal Ring Oscillator Control Register
: Crystal oscillator warm-up status.
[0,0] = F
[1,0] = F
: Select AUXAD for MOVX with Ri.
F
RING
It represents if the crystal clock is stable(1) or not(0).
Cleared by H/W if XTOFF is set or if PD is set and
WDT is not enabled.
Set by H/W after crystal stabilization time.
0 = Internal RING oscillator disable.
Don’t clear RINGON bit when XTRG = 0.
1 = AUXAD register serves high address for MOVX with Ri.
0 = P2 register serves high address for MOVX with Ri.
= 2.8 MHz (at room temp. 3.3V, +/- 15%)
-
-
-
RING
RING
/ 1
/ 4
XTUP
R(1)
Semiconductor Co., Ltd.
-
-
R/W(0)
ENAUX
[0,1] = F
[1,1] = F
SFR Description [C5h ~ CBh]
-
-
RINGON
R/W(1) R/W(0) R/W(0)
RING
RING
-
-
/ 2
/ 8
DIV1
-
-
PKGOPT
R/W(0)
DIV0
-
RCAP2H.7 RCAP2H.6 RCAP2H.5 RCAP2H.4 RCAP2H.3 RCAP2H.2 RCAP2H.1 RCAP2H.0
RCAP2L.7 RCAP2L.6 RCAP2L.5 RCAP2L.4 RCAP2L.3 RCAP2L.2 RCAP2L.1 RCAP2L.0
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
T2CON
TF2
T2MOD
RCAP2L
RCAP2H
-
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2 : Capture/Reload flag.
T2OE
DCEN
EXF2
(C8h) : Timer/Counter 2 Control Register
-
(C9h) : Timer/Counter 2 Mode Control Register
(CAh) :
(CBh) :
: Timer 2 overflow flag.
: Timer 2 external flag.
: Receive clock flag.
: Transmit clock flag.
: Timer 2 external enable flag.
: Timer 2 run flag.
: Timer 2 Timer/Counter select. When set, counter by T2.
: Timer 2 clock output enable. When set, clock output to P1.0.
: Timer 2 down count enable. When set, count down.
CP/RL2 = 0, Reload.
CP/RL2 = 1, Capture. (RCAP2H,RCAP2L)
RCLK
-
Timer/Count 2 Capture/Reload Low Byte Register
Timer/Counter 2 Capture/Reload High Byte Register
(11/17)
TCLK
-
MiDAS2.0 Family
EXEN2
-
(TH2,TL2)
TR2
-
R/W(0) R/W(0)
(RCAP2H,RCAP2L)
T2OE
C/T2
CP/RL2
(TH2,TL2)
DCEN
[125]

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