gc80c590ae CORERIVER Semiconductor, gc80c590ae Datasheet - Page 121

• Manufacturer Part Number: gc80c590ae
• Description: Flash / Isp / Iap 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

SADDR.7 SADDR.6 SADDR.5 SADDR.4 SADDR.3 SADDR.2 SADDR.1 SADDR.0
SADDR1.7 SADDR1.6 SADDR1.5 SADDR1.4 SADDR1.3 SADDR1.2 SADDR1.1 SADDR1.0
SADEN1.7 SADEN1.6 SADEN1.5 SADEN1.4 SADEN1.3 SADEN1.2 SADEN1.1 SADEN1.0
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
IE
SADDR
SADDR1
SADEN1
EA
Appendix B :
Programmed with the given or broadcast address assigned to serial port 0.
Programmed with the given or broadcast address assigned to serial port 1.
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
(A8h) : Interrupt Enable Register
EADC
(A9h) : Slave Address Register of UART0
(ABh) : Slave Address Mask Enable Register of UART1
(AAh) : Slave Address Register of UART1
: Global interrupt enable.
: ADC interrupt enable.
: Timer 2 interrupt enable.
: Serial port interrupt enable.
: Timer 1 interrupt enable.
: External interrupt 1 enable.
: Timer0 interrupt enable.
: External interrupt 0 enable.
ET2
ES
Semiconductor Co., Ltd.
SFR Description [A8h ~ ADh]
ET1
EX1
ET0
EX0
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0)
CIDL
C0CON
C0MOD
CF
CF
CR
CCF5
CCF4
CCF3
CCF2
CCF1
CCF0
CIDL
PWMDYN: Dynamic PWM bit.
CPS[3:0] : PCA count rate (F
ECF
PWMDYN
R/W(0)
CR
(ACh) : PCA0 Counter Control Register
(ADh) : PCA0 Counter Mode Register
: PCA counter overflow flag.
: PCA counter run control bit.
: MODULE5 interrupt flag.
: MODULE4 interrupt flag.
: MODULE3 interrupt flag.
: MODULE2 interrupt flag.
: MODULE1 interrupt flag.
: MODULE0 interrupt flag.
: Counter Idle Control.
: Enable PCA counter overflow interrupt.
Set by software to turn the PCA counter on.
Set by hardware when a match or capture occurs.
Must be cleared by software.
CIDL = 0 programs the PCA counter to continue
functioning during Idle Mode.
CIDL = 1 programs it to be stop during Idle Mode.
C0L is cleared when a match occurs between C0L and C0H.
The match signal replaces the overflow signal for PWM.
ECF = 1 enables CF bit int C0CON to generate an interrupt.
ECF = 0 disables that function.
If this bit is set, the dynamic PWM is generated.
CCF5
-
(7/17)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
CCF4
CPS3
MiDAS2.0 Family
PCA
) select.
CCF3
CPS2
CCF2
CPS1
CCF1
CPS0
CCF0
ECF
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