mpc8308 Freescale Semiconductor, Inc, mpc8308 Datasheet - Page 78

• Manufacturer Part Number: mpc8308
• Description: Mpc8308 Powerquicc Ii Pro Processor Hardware Specification
• Manufacturer: Freescale Semiconductor, Inc

Clocking
coherent system bus clock (csb_clk).
for select csb_clk to SYS_CLK_IN ratios.
21.3
RCWL[COREPLL] selects the ratio between the internal coherent system bus clock (csb_clk) and the e300
core clock (core_clk).
not listed in
78
0–1
nn
11
00
01
10
00
01
10
00
01
10
00
01
RCWL[COREPLL]
Core PLL Configuration
Table 58
0010
0100
0101
nnnn
0000
0001
0001
0001
0001
0001
0001
0010
0010
0010
0010
0010
Core VCO frequency = core frequency × VCO divider. The VCO divider,
which is determined by RCWLR[COREPLL], must be set properly so that
the core VCO frequency is in the range of 400–800 MHz.
2–5
csb_clk :Input Clock Ratio
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 1
should be considered as reserved.
Table 58
1
1
1
0
0
0
1
1
6
0
n
0
0
0
SPMF
(PLL off, csb_clk clocks core directly)
shows the encodings for RCWL[COREPLL]. COREPLL values that are
2:1
4:1
5:1
Table 58. e300 Core PLL Configuration
core_clk: csb_clk Ratio
Table 57. CSB Frequency Options
Table 57
PLL bypassed
1.5:1
1.5:1
1.5:1
2.5:1
2.5:1
2:1
2:1
2:1
n/a
1:1
1:1
1:1
shows the expected frequency values for the CSB frequency
NOTE
125
1
25
Input Clock Frequency (MHz)
(PLL off, csb_clk clocks core directly)
33.33
VCO Divider (VCOD)
133
PLL bypassed
n/a
2
4
8
2
4
8
2
4
8
2
4
Freescale Semiconductor
66.67
133
2