mpc8308 Freescale Semiconductor, Inc, mpc8308 Datasheet - Page 54

• Manufacturer Part Number: mpc8308
• Description: Mpc8308 Powerquicc Ii Pro Processor Hardware Specification
• Manufacturer: Freescale Semiconductor, Inc

JTAG
Figure 40
Figure 41
54
At recommended operating conditions (see
Output hold times:
Notes:
1. All outputs are measured from the midpoint voltage of the falling/rising edge of t
2. The symbols used for timing specifications follow the pattern of t
4. Non-JTAG signal input timing with respect to t
5. Non-JTAG signal output timing with respect to t
6. Guaranteed by design and characterization.
JTAG external clock to output high impedance:
3. TRST is an asynchronous level sensitive signal. The setup time is for test purposes only.
inputs and t
going to the high (H) state or setup time. Also, t
The output timings are measured at the pins. All output timings assume a purely resistive 50-Ω load (see
Time-of-flight delays must be added for trace lengths, vias, and connectors in the system.
timing (JT) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
(D) went invalid (X) relative to the t
symbol representation is based on three letters representing the clock of a particular functional. For rise and fall times, the
latter convention is used with the appropriate letter: R (rise) or F (fall).
provides the AC test load for TDO and the boundary-scan outputs.
provides the JTAG clock input timing diagram.
Table 42. JTAG AC Timing Specifications (Independent of SYS_CLK_IN)
(first two letters of functional block)(reference)(state)(signal)(state)
External Clock
Parameter
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 1
JTAG
Output
Figure 40. AC Test Load for the JTAG Interface
JTG
Figure 41. JTAG Clock Input Timing Diagram
Boundary-scan data
Boundary-scan data
Table
VM
clock reference (K) going to the high (H) state. Note that, in general, the clock reference
t
JTKHKL
2).
Z
VM = Midpoint Voltage (NV
0
JTDXKH
TCLK
t
= 50 Ω
JTG
TCLK
TDO
TDO
.
VM
.
symbolizes JTAG timing (JT) with respect to the time data input signals
Symbol
t
t
t
t
JTKLDX
JTKLOX
JTKLOZ
JTKLDZ
VM
(first two letters of functional block)(signal)(state) (reference)(state)
for outputs. For example, t
2
DD
R
/2)
L
= 50 Ω
Min
TCLK
t
2
2
2
2
JTGR
to the midpoint of the signal in question.
NV
JTDVKH
Max
DD
19
—
—
t
9
JTGF
/2
1
(continued)
symbolizes JTAG device
Freescale Semiconductor
JTG
clock reference (K)
Unit
ns
ns
Figure
40).
Notes
5, 6
5
for