mpc8360e Freescale Semiconductor, Inc, mpc8360e Datasheet - Page 35

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mpc8360e

Manufacturer Part Number
mpc8360e
Description
Mpc8360e Powerquicc Ii Pro Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Figure 17
8.2.4.2
Table 34
Freescale Semiconductor
At recommended operating conditions with LV
PMA_RX_CLK clock period
PMA_RX_CLK skew
RX_CLK duty cycle
RCG[9:0] setup time to rising PMA_RX_CLK
RCG[9:0] hold time to rising PMA_RX_CLK
RX_CLK clock rise time, VIL(min) to VIH(max)
RX_CLK clock fall time, VIH(max) to VIL(min)
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. Setup and hold time of even numbered RCG are measured from riding edge of PMA_RX_CLK1. Setup and hold time of
MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2
(reference)(state)
symbolizes TBI receive timing (TR) with respect to the time data input signals (D) reach the valid state (V) relative to the
t
respect to the time data input signals (D) went invalid (X) relative to the t
Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a
particular functional. For example, the subscript of t
the latter convention is used with the appropriate letter: R (rise) or F (fall). For symbols representing skews, the subscript
is skew (SK) followed by the clock that is being skewed (TRX).
odd numbered RCG are measured from riding edge of PMA_RX_CLK0.
TRX
clock reference (K) going to the high (H) state or setup time. Also, t
provides the TBI receive AC timing specifications.
shows the TBI transmit AC timing diagram.
TBI Receive AC Timing Specifications
Parameter/Condition
GTX_CLK
for inputs and t
TXD[7:0]
TX_EN
TX_ER
(first two letters of functional block)(reference)(state)(signal)(state)
Table 34. TBI Receive AC Timing Specifications
Figure 17. TBI Transmit AC Timing Diagram
t
TTXH
DD
/ OV
t
TTX
DD
of 3.3 V ± 10%.
TRX
t
represents the TBI (T) receive (RX) clock. For rise and fall times,
Symbol
TRXH
t
t
t
TRDVKH
TRDXKH
SKTRX
t
t
TRXR
t
TRXF
TRX
UCC Ethernet Controller: Three-Speed Ethernet, MII Management
/t
t
TRX
TTXF
1
(first two letters of functional block)(signal)(state)
TRX
TRDXKH
Min
t
7.5
2.5
1.0
0.7
0.7
40
TTKHDX
clock reference (K) going to the high (H) state.
t
TTXR
symbolizes TBI receive timing (TR) with
for outputs. For example, t
16.0
Typ
Max
8.5
2.4
2.4
60
Unit
ns
ns
ns
ns
ns
ns
%
TRDVKH
Notes
2
2
35

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