mpc8250 Freescale Semiconductor, Inc, mpc8250 Datasheet - Page 11

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mpc8250

Manufacturer Part Number
mpc8250
Description
Mpc8250 Powerquicc Ii Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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where K is a constant pertaining to the particular part. K can be determined from equation (3) by measuring
P
solving equations (1) and (2) iteratively for any value of T
2.3.1
Each V
pin should likewise be provided with a low-impedance path to ground. The power supply pins drive
distinct groups of logic on chip. The V
0.1 µF by-pass capacitors located as close as possible to the four sides of the package. The capacitor leads
and associated printed circuit traces connecting to chip V
inch per capacitor lead. A four-layer board is recommended, employing two inner layers as V
planes.
All output pins on the MPC8250 have fast rise and fall times. Printed circuit (PC) trace interconnection
length should be minimized in order to minimize overdamped conditions and reflections caused by these
fast output switching times. This recommendation particularly applies to the address and data buses.
Maximum PC trace lengths of six inches are recommended. Capacitance calculations should consider all
device loads as well as parasitic capacitances due to the PC traces. Attention to proper PCB layout and
bypassing becomes especially critical in systems with higher capacitive loads because these loads create
higher transient currents in the V
inputs during reset. Special care should be taken to minimize the noise levels on the PLL supply pins.
Table 5
thermal management is required for conditions above P
greater) to ensure the junction temperature does not exceed the maximum specified value. Also note that
the I/O power should be included when determining whether to use a heat sink.
Freescale Semiconductor
D
(at equilibrium) for a known T
1
2
CC
provides preliminary, estimated power dissipation for various configurations. Note that suitable
(MHz)
Test temperature = room temperature (25
P
66.66
66.66
66.66
66.66
83.33
83.33
83.33
Bus
INT
pin should be provided with a low-impedance path to the board’s power supply. Each ground
Layout Practices
= I
DD
Multiplier
x V
Table 5. Estimated Power Dissipation for Various Configurations
CPM
2.5
2.5
DD
2
3
3
2
2
Watts
Core CPU
Multiplier
4.5
3.5
3
3
4
3
3
CC
A
MPC8250 Hardware Specifications, Rev. 1
. Using this value of K
and GND circuits. Pull up all unused inputs or signals that will be
CC
(MHz)
CPM
133
166
200
200
166
166
208
power supply should be bypassed to ground using at least four
°
C)
(MHz)
CPU
200
200
266
300
250
250
291
D
CC
= 3W (when the ambient temperature is 70° C or
,
A
the values of P
Nominal
.
and ground should be kept to less than half an
1.2
1.3
Vddl 1.8 Volts
Maximum
2.1
2
D
P
Electrical and Thermal Characteristics
INT
and T
(W)
Nominal
2
J
1.8
1.9
2.3
2.4
2.2
2.2
2.4
Vddl 2.0 Volts
can be obtained by
1
Maximum
2.3
2.3
2.9
3.1
2.8
2.8
3.1
CC
and GND
11

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