mpc8241tzq266c Freescale Semiconductor, Inc, mpc8241tzq266c Datasheet - Page 22

• Manufacturer Part Number: mpc8241tzq266c
• Description: Mpc8241 Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Electrical and Thermal Characteristics
22
Shown in 2:1 Mode
SDRAM_SYNC_IN
Notes:
VM = Midpoint voltage (1.4 V).
10b-d = Input signals valid timing.
11a = Input hold time of SDRAM_SYNC_IN to memory.
12b-d = sys_logic_clk to output valid timing.
13b = Output hold time for non-PCI signals.
14b = SDRAM-SYNC_IN to output high-impedance timing for non-PCI signals.
T
PCI_SYNC_IN
os
Inputs/Outputs
(after DLL locks)
PCI_SYNC_IN
Inputs/Outputs
= Offset timing required to align sys_logic_clk with SDRAM_SYNC_IN. The SDRAM_SYNC_IN signal
sys_logic_clk
is adjusted by the DLL to accommodate for internal delay. This causes SDRAM_SYNC_IN to appear
before sys_logic_clk once the DLL locks.
Figure 11. Input/Output Timing Diagram Referenced to SDRAM_SYNC_IN
Memory
Figure 12. Input/Output Timing Diagram Referenced to PCI_SYNC_IN
PCI
MPC8241 Integrated Processor Hardware Specifications, Rev. 10
10a
10b-d
Input Timing
T
Input Timing
GV
os
VM
DD
0.4 x
VM
VM
_OV
GV
DD
DD
2
_OV
11a
11c
2.0 V
0.8 V
DD
GV
2.0 V
0.8 V
12a
DD
VM
12b-d
2
_OV
DD
Output Timing
GV
Output Timing
DD
0.615
0.285
_OV
14a
13a
DD
14b
13b
x
GV
Freescale Semiconductor
DD
VM
_OV
2
DD