mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 56
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mc68hc05ct4fn
Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC05CT4FN.pdf
(142 pages)
- Current page: 56 of 142
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Parallel Input/Output (I/O)
7.4 Port B
7.5 Port C
General Release Specification
Port B is an 8-bit bidirectional port. The port B data register is at $0001
and the data direction register (DDR) is at $0005. Reset does not affect
the data registers, but clears the data direction registers, thereby
returning the ports to inputs. Writing a logic 1 to a DDR bit sets the
corresponding port bit to output mode.
Port C is an 8-bit bidirectional port. The port C data register is at $0002
and the data direction register (DDR) is at $0006. Reset does not affect
the data registers, but clears the data direction registers, thereby
returning the ports to inputs. Writing a logic 1 to a DDR bit sets the
corresponding port pin to output mode. Each of the port C pins has an
optional pullup device. When the DDR bit is cleared and the pullup
device is enabled, the pin will be a pullup and an interrupt pin. The edge-
or edge- and level-sensitivity of the IRQ pin also pertains to the enabled
port C pins. Care needs to be taken when using port C pins that have the
pullup enabled. Before switching from an output to an input, the data
should be preconditioned to a logic 1 to prevent an interrupt from
occurring. Port C bit 7 is also shared with the PWM output. When PC7
is used as the PWM output, its pullup option should not be selected
(see
Freescale Semiconductor, Inc.
PC7
For More Information On This Product,
Figure
V
DD
DISABLED
Go to: www.freescale.com
7-1).
Parallel Input/Output (I/O)
NORMAL PORT CIRCUITRY
AS SHOWN IN FIGURE 7-2
FROM ALL OTHER PORT C PINS
V
ENABLED
Figure 7-1. Port C Pullup Option
DD
(PC7 ADDS PWM)
MASK OPTION (PC7PU)
DDR BIT
IRQ
SCHMITT
TRIGGER
MC68HC05CT4
TO INTERRUPT
LOGIC
—
Rev. 2.0
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