mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 5
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mc68hc05ct4fn
Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC05CT4FN.pdf
(142 pages)
- Current page: 5 of 142
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General Release Specification — MC68HC05CT4
MC68HC05CT4
—
Rev. 2.0
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.4.9
1.4.10
1.4.11
1.4.12
2.1
2.2
2.3
2.4
2.5
2.6
Freescale Semiconductor, Inc.
For More Information On This Product,
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Mask Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Signal Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Read-Only Memory (ROM). . . . . . . . . . . . . . . . . . . . . . . . . . . .25
ROM Security Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Random-Access Memory (RAM) . . . . . . . . . . . . . . . . . . . . . . .26
V
V
Maskable Interrupt Request (IRQ) . . . . . . . . . . . . . . . . . . .21
OSC1 and OSC2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Reset (RESET)
Port A (PA0–PA7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Port B (PB0–PB7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Port C (PC0–PC7/PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Port D (PD0/CMP3+, PD1/CMP1–, PD2/CMP12+,
TCAP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
FinT and FinR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
PDoutT and PDoutR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
DD
DD2
Go to: www.freescale.com
PD3/CMP2–, PD4/SDIO, PD5/SCK,
and PD6/TCMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
and V
and V
Table of Contents
Section 1. General Description
SS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
SS2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Section 2. Memory
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Table of Contents
General Release Specification
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