mc68hc908gr16 Freescale Semiconductor, Inc, mc68hc908gr16 Datasheet - Page 252

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mc68hc908gr16

Manufacturer Part Number
mc68hc908gr16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Development Support
Upon power-on reset, if the received bytes of the security code do not match the data at locations
$FFF6–$FFFD, the host fails to bypass the security feature. The MCU remains in monitor mode, but
reading a FLASH location returns an invalid value and trying to execute code from FLASH causes an
illegal address reset. After receiving the eight security bytes from the host, the MCU transmits a break
character, signifying that it is ready to receive a command.
To determine whether the security code entered is correct, check to see if bit 6 of RAM address $40 is
set. If it is, then the correct security code has been entered and FLASH can be accessed.
If the security sequence fails, the device should be reset by a power-on reset and brought up in monitor
mode to attempt another entry. After failing the security sequence, the FLASH module can also be mass
erased by executing an erase routine that was downloaded into internal RAM. The mass erase operation
clears the security code locations so that all eight security bytes become $FF (blank).
252
V
RST
PA0
Notes:
DD
The MCU does not transmit a break character until after the host sends the
eight security bytes.
1 = Echo delay, 2 bit times
2 = Data return delay, 2 bit times
4 = Wait 1 bit time before sending next byte
5 = Wait until a clock is stable (if PLL is enabled) and the monitor ROM runs
FROM HOST
Figure 19-18. Monitor Mode Entry Timing
4096 + 32 CGMXCLK CYCLES
FROM MCU
5
MC68HC908GR16 Data Sheet, Rev. 5.0
1
NOTE
4
1
1
2
4
Freescale Semiconductor
1

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