at43101 ATMEL Corporation, at43101 Datasheet - Page 12

• Manufacturer Part Number: at43101
• Description: Pcmcia Card Memory Interface Circuit With 256 Bytes Of Internal Attribute Memory Eeprom
• Manufacturer: ATMEL Corporation

AC Write Characteristics
Notes:
12
tia(A)
tid(D)
tsu(A)
th(A)
tsu(D)
th(D)
tsu(CE)
th(CE)
twc
twr
tsu(REG)
th(REG)
tiwel(A0)
tiwel(CE)
tiwel(WE)
tiwel(REG)
tiweh(A0)
tiweh(CE)
tiweh(WE)
tiweh(REG)
twp(IWP)
twe(IWP)
tRB(WE)
tRB(IRB)
Symbol
1. Parameter applies to writes of internal E
2. Either or both of CE1*, CE2* assert according to function truth table.
3. REG* asserted only for Attribute Memory write. REG* must be stable
4. One or both of IWEH*, IWEL* assert per A0, CE1*, CE2*, provided REG* is high.
5. Not shown in timing diagrams.
during the write at the level appropriate to the memory type being accessed.
Parameter
Delay to IA[24:0], from A[24:0]
Delay to ID[15:0], from D[15:0]
Setup time, A[24:0] valid before WE* assertion
Hold time, A[24:0] after WE* de-assertion
Setup time, D[15:0] valid before WE* de-assertion
Hold time, D[15:0] after WE* de-assertion
Setup time, CE*, CE* before WE* de-assertion
Hold time, CE*, CE* after WE* de-assertion
Write cycle time
Minimum active pulse of WE*, CE1*
Setup time, REG* to WE*
Hold time, REG* after WE* de-assertion
Delay to IWEL*, IWEH* assertion from A0
Delay to IWEL*, IWEH* assertion from CE*
Delay to IWEL*, IWEH* assertion from WE*
Delay to IWEL*, IWEH* assertion from REG*
Delay to IWEL*, IWEH* de-assertion from A0
Delay to IWEL*, IWEH* de-assertion from CE*
Delay to IWEL*, IWEH* de-assertion from WE*
Delay to IWEL*, IWEH* de-assertion from REG*
Delay to WP, from IWP*
Delay to IWEH*, IWEL* from IWP*
Delay to R/B* from start of E
Delay to R/B* from IR/B*
AT43101
2
PROM write
2
PROM.
190 ns
190 ns
190 ns
10 ns
10 ns
26 ns
11 ns
Min
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10 ms
50 ns
30 ns
31 ns
25 ns
25 ns
25 ns
25 ns
25 ns
25 ns
25 ns
25 ns
25 ns
25 ns
40 ns
Max
Note
1
1
1
1
1
1
2
2
1
4
4
4
4
2
3
5
5