cy8c5246pvi-092 Cypress Semiconductor Corporation., cy8c5246pvi-092 Datasheet - Page 24

• Manufacturer Part Number: cy8c5246pvi-092
• Description: Programmable System-on-chip Psoc
• Manufacturer: Cypress Semiconductor Corporation.

6.2.1.2 Alternate Active Mode
Alternate Active mode is very similar to Active mode. In alternate
active mode, fewer subsystems are enabled, to reduce power
consumption. One possible configuration is to turn off the CPU
and Flash, and run peripherals at full speed.
6.2.1.3 Sleep Mode
Sleep mode reduces power consumption when a resume time of
12 µs is acceptable. The wake time is used to ensure that the
regulator outputs are stable enough to directly enter active
mode.
6.2.1.4 Hibernate Mode
In hibernate mode nearly all of the internal functions are
disabled. Internal voltages are reduced to the minimal level to
keep vital systems alive. Configuration state is preserved in
hibernate mode and SRAM memory is retained. GPIOs
configured as digital outputs maintain their previous values and
external GPIO pin interrupt settings are preserved. The
hibernate reset (HRES) occurs if the internal voltage falls below
the minimum level required for state retention. The device can
only return from hibernate mode in response to an external I/O
interrupt. The resume time from hibernate mode is less than
100 µs.
6.2.1.5 Wakeup Events
Wakeup events are configurable and can come from an interrupt
or device reset. A wakeup event restores the system to active
mode. Interrupt sources include internally generated interrupts,
power supervisor, central timewheel, and I/O interrupts. Internal
interrupt sources can come from a variety of peripherals, such
as analog comparators and UDBs. The central timewheel
provides periodic interrupts to allow the system to wake up, poll
peripherals, or perform real-time functions. Reset event sources
include the external reset I/O pin (XRES), WDT, and Precision
Reset (PRES).
6.2.2 Boost Converter
Applications that use a supply voltage of less than 1.71V, such
as solar or single cell battery supplies, may use the on-chip boost
converter. The boost converter may also be used in any system
that requires a higher operating voltage than the supply provides.
For instance, this includes driving 5.0V LCD glass in a 3.3V
system. The boost converter accepts an input voltage as low as
0.5V. With one low cost inductor it produces a selectable output
voltage sourcing enough current to operate the PSoC and other
on-board components.
The boost converter accepts an input voltage from 0.5V to 5.5V
(Vbat). The converter provides a user configurable output
voltage of 1.8 to 5.0V (Vboost); Vbat must be less than Vboost.
The block can deliver up to 50 mA (Iboost) depending on config-
uration.
Four pins are associated with the boost converter: Vbat, Vssb,
Vboost, and Ind. The boosted output voltage is sensed at the
Vboost pin and must be connected directly to the chip’s supply
inputs. An inductor is connected between the Vbat and Ind pins.
The designer can optimize the inductor value to increase the
boost converter efficiency based on input voltage, output
voltage, current and switching frequency. The External Schottky
diode shown in
Vboost>3.6V.
Document Number: 001-55034 Rev. *A
Figure 6-4
is required only in cases when
PRELIMINARY
Figure 6-4. Application for Boost Converter
The boost converter can be operated in two different modes:
active and standby. Active mode is the normal mode of operation
where the boost regulator actively generates a regulated output
voltage. In standby mode, most boost functions are disabled,
thus reducing power consumption of the boost circuit. The
converter can be configured to provide low power, low current
regulation in the standby mode. The external 32 kHz crystal can
be used to generate inductor boost pulses on the rising and
falling edge of the clock when the output voltage is less than the
programmed value. This is called automatic thump mode (ATM).
The boost typically draws 200 µA in active mode and 12 µA in
standby mode. The boost operating modes must be used in
conjunction with chip power modes to minimize the total chip
power consumption.
available in different chip power modes.
Table 6-4. Chip and Boost Power Modes Compatibility
The switching frequency can be set to 100 kHz, 400 kHz, 2 MHz,
or 32 kHz to optimize efficiency and component cost. The 100
kHz, 400 kHz, and 2 MHz switching frequencies are generated
using oscillators internal to the boost converter block. When the
32 kHz switching frequency is selected, the clock is derived from
a 32 kHz external crystal oscillator. The 32 kHz external clock is
primarily intended for boost standby mode.
If the boost converter is not used in a given application, tie the
Vbat, Vssb, and Vboost pins to ground and leave the Ind pin
unconnected.
Chip -Active mode
Chip -Sleep mode
Chip-Hibernate mode
Vboost > 3.6V
Schottky Diode
Chip Power Modes
Only required
Optional
PSoC
10 µH
22 µF
®
5: CY8C52 Family Data Sheet
SMP
Vbat
Vssb
Vboost
Ind
Table 6-4
Boost can be operated in either active
or standby mode.
Boost can be operated in either active
or standby mode. However, it is recom-
mended to operate boost in standby
mode for low power consumption
Boost can only be operated in active
mode. However, it is recommended not
to use boost in chip hibernate mode
due to high current consumption in
boost active mode
Vdda Vddd
PSoC
lists the boost power modes
Boost Power Modes
Vssa
Vssd
Vddio
22 µF 0. 1 µF
Page 24 of 85
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