at94k10al ATMEL Corporation, at94k10al Datasheet - Page 47
at94k10al
Manufacturer Part Number
at94k10al
Description
At94k05al 5k - 40k Gates Of At40k Fpga With 8-bit Microcontroller, Up To 36k Bytes Of Sram And On-chip Jtag Ice
Manufacturer
ATMEL Corporation
Datasheet
1.AT94K10AL.pdf
(204 pages)
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1138I–FPSLI–1/08
Figure 4-6.
Figure 4-7
operation using two register operands is executed, and the result is stored back to the destina-
tion register.
Figure 4-7.
The internal data SRAM access is performed in two system clock cycles as described in
Figure
Figure 4-8.
Register Operands Fetch
2nd Instruction Execute
AVR CLK
3rd Instruction Execute
1st Instruction Execute
ALU Operation Execute
Address
2nd Instruction Fetch
3rd Instruction Fetch
4th Instruction Fetch
1st Instruction Fetch
4-8.
Total ExecutionTime
Data
Data
WR
Result Write Back
RD
shows the internal timing concept for the register file. In a single clock cycle an ALU
The Parallel Instruction Fetches and Instruction Executions
Single Cycle ALU Operation
On-chip Data SRAM Access Cycles
AVR CLK
AVR CLK
Prev. Address
T1
T1
T1
Address
T2
AT94KAL Series FPSLIC
T2
T2
T3
T3
T3
T4
T4
T4
47