at94k10al ATMEL Corporation, at94k10al Datasheet - Page 45

• Manufacturer Part Number: at94k10al
• Description: At94k05al 5k - 40k Gates Of At40k Fpga With 8-bit Microcontroller, Up To 36k Bytes Of Sram And On-chip Jtag Ice
• Manufacturer: ATMEL Corporation

4.7
4.8
4.9
4.10
4.10.1
1138I–FPSLI–1/08
X-register, Y-register and Z-register
ALU – Arithmetic Logic Unit
Multiplier Unit
SRAM Data Memory
Program and Data Addressing Modes
Registers R26..R31 have some added functions to their general-purpose usage. These registers
are address pointers for indirect addressing of the SRAM. The three indirect address registers X,
Y and Z have functions as fixed displacement, automatic increment and decrement (see the
descriptions for the different instructions).
The high-performance AVR ALU operates in direct connection with all the 32 general-purpose
working registers. Within a single clock cycle, ALU operations between registers in the register
file are executed. The ALU operations are divided into three main categories – arithmetic, logical
and bit-functions.
The high-performance AVR Multiplier operates in direct connection with all the 32 general-pur-
pose working registers. This unit performs 8 x 8 multipliers every two clock cycles. See multiplier
details on
External data SRAM (or program) cannot be used with the FPSLIC AT94K family.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement and Indirect with Post-increment. In the register file,
registers R26 to R31 feature the indirect addressing pointer registers.
The Indirect with Displacement mode features a 63 address locations reach from the base
address given by the Y- or Z-register.
When using register indirect addressing modes with automatic Pre-decrement and Post-incre-
ment, the address registers X, Y and Z are decremented and incremented.
The entire data address space including the 32 general-purpose working registers and the 64
I/O registers are all accessible through all these addressing modes. See the next section for a
detailed description of the different addressing modes.
The embedded AVR core supports powerful and efficient addressing modes for access to the
program memory (SRAM) and data memory (SRAM, Register File and I/O Memory). This sec-
tion describes the different addressing modes supported by the AVR architecture.
Register Direct, Single-register Rd
The operand is contained in register d (Rd).
Register Direct, Two Registers Rd and Rr
Operands are contained in register r (Rr) and d (Rd). The result is stored in register d (Rd).
I/O Direct
Operand address is contained in 6 bits of the instruction word. n is the destination or source reg-
ister address.
page
112.
AT94KAL Series FPSLIC
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