xc6vcx75t Xilinx Corp., xc6vcx75t Datasheet - Page 20

• Manufacturer Part Number: xc6vcx75t
• Description: Virtex-6 Cxt Family Data Sheet
• Manufacturer: Xilinx Corp.

Table 26
Transceivers User Guide for further details.
Table 26: GTX Transceiver Clock DC Input Level Specification
GTX Transceiver Switching Characteristics
Consult Virtex-6 FPGA GTX Transceivers User Guide for further information.
Table 27: GTX Transceiver Performance
Table 28: GTX Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Table 29: GTX Transceiver Reference Clock Switching Characteristics
X-Ref Target - Figure 13
DS153 (v1.4) July 28, 2010
Advance Product Specification
V
R
C
F
F
F
F
F
T
T
T
T
T
Symbol
GTXMAX
GPLLMAX
GPLLMIN
GTXDRPCLK
GCLK
RCLK
FCLK
DCREF
LOCK
PHASE
IDIFF
IN
EXT
Symbol
Symbol
Symbol
summarizes the DC specifications of the clock input of the GTX transceiver. Consult theVirtex-6 FPGA GTX
Reference clock frequency range
Reference clock rise time
Reference clock fall time
Reference clock duty cycle
Clock recovery frequency acquisition
time
Clock recovery phase acquisition time
GTXDRPCLK maximum frequency
Maximum GTX transceiver data rate
Maximum PLL frequency
Minimum PLL frequency
Differential peak-to-peak input voltage
Differential input resistance
Required external AC coupling capacitor
Description
80%
20%
DC Parameter
T
FCLK
Figure 13: Reference Clock Timing Parameters
Description
Description
20% – 80%
80% – 20%
Transceiver PLL only
Initial PLL lock
Lock to data after PLL has locked to
the reference clock
T
www.xilinx.com
RCLK
Conditions
Conditions
67.5
Min
45
–
–
–
–
3.75
Min
210
2.5
1.2
100
90
-2
–
-2
ds153_13_041410
Virtex-6 CXT Family Data Sheet
All Speed Grades
Speed Grade
Speed Grade
Typ
800
100
100
Typ
200
200
50
–
–
–
3.75
2.5
1.2
100
-1
-1
2000
Max
130
Max
375
200
–
55
–
–
1
Units
Units
Gb/s
GHz
GHz
MHz
Units
Units
MHz
mV
nF
ms
ps
ps
µs
Ω
%
20