xc5210 Xilinx Corp., xc5210 Datasheet - Page 34

• Manufacturer Part Number: xc5210
• Description: Logic Cell Array Family , Inc
• Manufacturer: Xilinx Corp.

XC5200 Logic Cell Array Family
CLB Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from
benchmark timing patterns. The following guidelines reflect worst-case values over the recommended operating
conditions. For more detailed, more precise, and more up-to-date timing information, use the values provided by the
XACT timing calculator and used in the simulator.
Description
Combinatorial Delays
Carry Delays
Sequential Delays
Set-up Time Before Clock (CK)
Hold Times After Clock (CK)
Clock Widths
Reset Delays
Global Reset Delays (see Note 2)
Note:
F inputs to X output
DI inputs to DO output (Logic-Cell Feedthrough)
F inputs via F5_MUX to DO output
Incremental delay per bit
Carry-in overhead from DI
Carry-in overhead from F
Carry-out overhead to DO
Clock (CK) to out (Q) (Flip-Flop)
Gate (Latch enable) going active to out (Q)
F inputs
F inputs via F5_MUX
DI input
CE input
F inputs
F inputs via F5_MUX
DI input
CE input
Clock High Time
Clock Low Time
Width (High)
Delay from CLR to Q (Flip-Flop)
Delay from CLR to Q (Latch)
Width (High)
Delay from internal GCLR to Q
1.
2.
The CLB K to Q output delay (T
Data In hold-time requirement (T
Timing is based upon the XC5210 device. For other devices, see XACT Timing Calculator.
CKO
CKDI
) of any CLB, plus the shortest possible interconnect delay, is always longer than the
) of any CLB on the same die.
Speed Grade
Symbol
30
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
ILO
IDO
IMO
CY
CYDI
CYL
CYO
CKO
GO
ICK
MICK
DICK
EICK
CKI
CKMI
CKDI
CKEI
CH
CL
CLRW
CLR
CLRL
GCLRW
GCLR
(ns)
Min
2.1
3.6
0.5
1.2
6.0
6.0
6.0
6.0
0
0
0
0
-6
12.4
Max
(ns)
5.5
4.2
7.1
0.7
1.7
3.6
3.9
5.4
8.6
7.3
6.1
(ns)
Min
1.5
2.7
0.3
0.9
6.0
6.0
6.0
6.0
0
0
0
0
-5
10.2
Max
(ns)
4.5
3.3
5.7
0.6
1.5
3.2
3.1
4.4
6.8
5.8
4.8
(ns)
Min
Preliminary
-4
Max
(ns)