saa7893hl-02 NXP Semiconductors, saa7893hl-02 Datasheet - Page 41

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saa7893hl-02

Manufacturer Part Number
saa7893hl-02
Description
Saa7893hl Super Audio Media Player
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
9397 750 10925
Product data
Fig 38. Timing diagram for UDE interface with level sync mode.
Be_dat(7:0)
Data_req
B_WCLK
B_SYNC
B_BCLK
B_FLAG
9.2.1 Parallel mode
Polarity of Data_req, B_WCLK, B_FLAG and B_SYNC is programmable.
The UDE transmitter must react on the Data_req signal within 5 B_BCLK cycles. The
SAA7893HL samples the data on the positive slope of B_BCLK when the B_WCLK
signal is active.
When B_FLAG signal is active for one byte of the sector, the total sector will be
treated as erroneous.
The maximum clock frequency of B_BCLK is 20 MHz.
The Data_req line generated by the SAA7893HL is synchronized to the internal
sys_clk signal. Therefore, the Data_req line is asynchronous with respect to BCLK
line.
t su
t clk(h)
Rev. 02 — 26 February 2003
t h
t clk(l)
t su
t h
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Super audio media player
SAA7893HL
MCE054
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