saa7893hl-02 NXP Semiconductors, saa7893hl-02 Datasheet - Page 16

• Manufacturer Part Number: saa7893hl-02
• Description: Saa7893hl Super Audio Media Player
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 10925
Product data
Fig 9. Timing diagram of writing registers with no wait cycles.
H_DQ[15:0]
H_WAITn
H_A[6:1]
H_A_sel
H_RWn
H_CSn
8.2.1 Write mode: minimum cycle
t su
In
visualized. Pin H_A_sel is mapped on address pin H_A[7] of the host. The timing is,
of course, not to scale. When the base address is written, multiple accesses can be
done whereby the different LSB addresses are mapped on pins H_A[6:1]. In this way
a burst of 64 Hwords can be read or written to the same address. The 16 bits base
address can be read when H_A_sel is logic 1 and the signal H_RWn indicates a read
operation.
Remark: The H_waitn signal is synchronized to H_procclock (pin 18). So it depends
on the host used which H_procclock is provided. When the host can accept an
asynchronous H_waitn signal, the clock signal connected to the sys_clk input (pin 21)
can also be used as the clock signal to the H_procclock input.
Table 8:
Symbol
t
t
t
tot
su
h
Figure 8
Timing numbers of writing registers with no wait cycles
Parameter
total CSn time
set-up time from CS to host control/address
lines
hold time from CS to host control/address lines
the principle of first writing the base address indicated by H_A_sel is here
Rev. 02 — 26 February 2003
t tot
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Min
14
-
0
Super audio media player
SAA7893HL
t h
Typ
-
-
-
MBL622
Max
-
30
-
Unit
sys_clk
ns
ns
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