saa7191b NXP Semiconductors, saa7191b Datasheet - Page 30

• Manufacturer Part Number: saa7191b
• Description: Digital Multistandard Colour Decoder, Square Pixel Dmsd-sqp
• Manufacturer: NXP Semiconductors

Philips Semiconductors
August 1996
AUFD
“0F”
FSEL
SXCR
SCEN
OFTS
YDEL2
HFRS
“10”
VNOI1
CHCV7U
V
Digital Multistandard Colour Decoder,
Square Pixel (DMSD-SQP)
to
to
to
YDEL0
VNOI0
CHCV0
“11”
Automatic field detection:
Field select (AUFD-bit = 0):
SECAM cross-colour reduction:
Sync and clamping pulse enable:
Select output format:
Luminance delay compensation:
YDEL2
0
0
0
0
1
1
1
1
Select HREF
position:
Vertical noise reduction
VNOI1
0
0
1
1
Chrominance gain control (nominal values) for QAM-modulated input signals, effects
D7 D6 D5 D4
1
0
0
0
1
:
1
:
0
:
0
1
0
1
0
output amplitude (SECAM with fixed gain):
YDEL1
0
0
1
1
0
0
1
1
VNOI0
0
1
0
1
1
1
0
0
D3 D2 D1 D0
1
1
1
0
1
:
0
:
1
:
0
YDEL0
0
1
0
1
0
1
0
1
0 = normal, HREF is matched to YUV output port;
1 = HREF is matched to CVBS input port.
1
0
0
0
30
1
1
0
0
0 = field selection by FSEL-bit;
1 = automatic field detection.
0 = 50 Hz (625 lines);
1 = 60 Hz (525 lines)
0 = 4 : 1 : 1 format;
1 = 4 : 2 : 2 format.
mode
normal
searching window
auto-deflection
vertical noise reduction bypassed
0 = reduction off;
1 = reduction on.
0 = HCL and HSY outputs HIGH (pins 26 and 29);
1 = HCL and HSY outputs active
+1
+2
+3
0
4
3
2
1
figure
gain
maximum gain
CCIR level for PAL)
CCIR level for NTSC)
minimum gain
2 / LLC
2 / LLC
2 / LLC
2 / LLC
2 / LLC
2 / LLC
2 / LLC
2 / LLC
to
to
to
step size = 2 / LLC =
67.8 ns for 50 Hz
81.5 ns for 60 Hz
)
) default programmed
) values dependent
) on application
)
Product specification
SAA7191B