adsp-21469 Analog Devices, Inc., adsp-21469 Datasheet - Page 15

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adsp-21469

Manufacturer Part Number
adsp-21469
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet

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Preliminary Technical Data
DATA MODES
The address and data pins of the external memory interface are
muxed (using bits in the SYSCTL register) to support the exter-
nal memory interface data (input/output), the PDAP (input
only), and the FLAGS (input/output).
settings.
Table 7. Function of Data Pins
BOOT MODES
Table 8. Boot Mode Selection
CORE INSTRUCTION RATE TO CLKIN RATIO MODES
For details on processor timing, see
Figure 3 on Page
Table 9. Core Instruction Rate/ CLKIN Ratio Selection
DATA PIN MODE
000
001
010
011
100
101
110
111
BOOTCFG2–0
000
001
010
011
100
101
110
111
CLKCFG1–0
00
01
11
10
19.
Booting Mode
SPI Slave Boot
SPI Master Boot
AMI user boot (for 8-bit Flash boot)
Reserved
Link Port 0 Boot
Reserved
Reserved
Reserved
Core to CLKIN Ratio
6:1
32:1
Reserved
16:1
Timing Specifications
Table 7
FLAGS/PWM [15–0]
AMI_ADDR [23:8]
provides the pin
Rev. PrB | Page 15 of 56 | November 2008
PDAP (DATA + CTRL)
AMI_ADDR [23:0]
and
Three-state all pins
Reserved
Reserved
Reserved
Reserved
AMI_ADDR [7:0]
ADSP-21469/ADSP-21469W
FLAGS [15–0]
AMI_DATA [7:0]
AMI_DATA [7:0]
FLAGS [7–0]

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