adsp-21469 Analog Devices, Inc., adsp-21469 Datasheet - Page 10

• Manufacturer Part Number: adsp-21469
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

ADSP-21469/ADSP-21469W
Pulse-Width Modulation
The PWM module is a flexible, programmable, PWM waveform
generator that can be programmed to generate the required
switching patterns for various applications related to motor and
engine control or audio power control. The PWM generator can
generate either center-aligned or edge-aligned PWM wave-
forms. In addition, it can generate complementary signals on
two outputs in paired mode or independent signals in non-
paired mode (applicable to a single group of four PWM
waveforms).
The entire PWM module has four groups of four PWM outputs
each. Therefore, this module generates 16 PWM outputs in
total. Each PWM group produces two pairs of PWM signals on
the four PWM outputs.
The PWM generator is capable of operating in two distinct
modes while generating center-aligned PWM waveforms: single
update mode or double update mode. In single update mode the
duty cycle values are programmable only once per PWM period.
This results in PWM patterns that are symmetrical about the
mid-point of the PWM period. In double update mode, a sec-
ond updating of the PWM registers is implemented at the mid-
point of the PWM period. In this mode, it is possible to produce
asymmetrical PWM patterns that produce lower harmonic dis-
tortion in three-phase PWM inverters.
Link Ports
Two 8-bit wide link ports can connect to the link ports of other
DSPs or peripherals. Link ports are bidirectional ports having
eight data lines, an acknowledge line and a clock line. Link ports
can operate at a maximum frequency of 166 MHz.
SYSTEM DESIGN
The following sections provide an introduction to system design
options and power supply issues.
Program Booting
The internal memory of the ADSP-21469 boots at system
power-up from an 8-bit EPROM via the external port, link port,
an SPI master, or an SPI slave. Booting is determined by the
boot configuration (BOOTCFG2–0) pins (see
Page
The “Running Reset” feature allows a user to perform a reset of
the processor core and peripherals, but without resetting the
PLL and DDR2 DRAM controller, or performing a Boot. The
functionality of the CLKOUT/RESETOUT/RUNRSTIN pin has
now been extended to also act as the input for initiating a Run-
ning Reset. For more information, see the ADSP-2146x SHARC
Processor Hardware Reference.
Power Supplies
The processors have separate power supply connections for the
internal (V
(V
must meet the V
meet the V
be connected to the same power supply.
DD_A
15).
/V
SS_A
DD_INT
DD_EXT
) power supplies. The internal and analog supplies
DD_INT
), external (V
specification. All external supply pins must
specifications. The external supply must
DD_EXT
), and analog
Table 8 on
Rev. PrB | Page 10 of 56 | November 2008
Note that the analog supply pin (V
internal clock generator PLL. To produce a stable clock, it is rec-
ommended that PCB designs use an external filter circuit for the
V
the V
recommended ferrite chip is the muRata BLM18AG102SN1D).
To reduce noise coupling, the PCB should use a parallel pair of
power and ground planes for V
to connect the bypass capacitors to the analog power (V
and ground (V
specified in
log ground plane on the board—the V
directly to digital ground (V
Target Board JTAG Emulator Connector
Analog Devices DSP Tools product line of JTAG emulators uses
the IEEE 1149.1 JTAG test access port of the ADSP-21469 pro-
cessor to monitor and control the target board processor during
emulation. Analog Devices DSP Tools product line of JTAG
emulators provides emulation at full processor speed, allowing
inspection and modification of memory, registers, and proces-
sor stacks. The processor's JTAG interface ensures that the
emulator will not affect target system loading or timing.
For complete information on Analog Devices’ SHARC DSP
Tools product line of JTAG emulator operation, see the appro-
priate “Emulator Hardware User's Guide”.
DEVELOPMENT TOOLS
The ADSP-21469 processor is supported with a complete set of
CROSSCORE
including Analog Devices emulators and VisualDSP++
opment environment. The same emulator hardware that
supports other SHARC processors also fully emulates the
ADSP-21469 processor.
EZ-KIT Lite Evaluation Board
For evaluation of the processors, use the EZ-KIT Lite
being developed by Analog Devices. The board comes with on-
chip emulation capabilities and is equipped to enable software
development. Multiple daughter cards are available.
DD_A
V DDINT
DD_A
pin. Place the filter components as close as possible to
/V
Figure 2
HI Z FERRITE
BEAD CHIP
SS_A
Figure 2. Analog Power (V
®
SS_A
software and hardware development tools,
Preliminary Technical Data
pins. For an example circuit, see
) pins. Note that the V
are inputs to the processor and not the ana-
CLOSE TO V DD_A AND V SS_A PINS
100nF
LOCATE ALL COMPONENTS
SS
) at the chip
DD_INT
10nF
DD_A
DD_A
SS_A
and V
) Filter Circuit
) powers the processor’s
DD_A
pin should connect
1nF
SS
. Use wide traces
and V
Figure
SS_A
®
ADSP-21469
V DD_A
V SS_A
®
board
DD_A
devel-
2. (A
pins
)