adv7189b Analog Devices, Inc., adv7189b Datasheet - Page 14

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adv7189b

Manufacturer Part Number
adv7189b
Description
Multiformat Sdtv Video Decoder
Manufacturer
Analog Devices, Inc.
Datasheet

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ADV7189B
Table 8. Input Channel Switching Using INSEL[3:0]
INSEL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Analog Input Pins
CVBS1 = AIN1 (default)
CVBS2 = AIN2
CVBS3 = AIN3
CVBS4 = AIN4
CVBS5 = AIN5
CVBS6 = AIN6
Y1 = AIN1
C1 = AIN4
Y2 = AIN2
C2 = AIN5
Y3 = AIN3
C3 = AIN6
Y1 = AIN1
PB1 = AIN4
PR1 = AIN5
Y2 = AIN2
PB2 = AIN3
PR2 = AIN6
CVBS7 = AIN7
CVBS8 = AIN8
CVBS9 = AIN9
CVBS10 = AIN10
CVBS11 = AIN11
SET INSEL[3:0] FOR REQUIRED
MUXING CONFIGURATION
Description
Video Format
Composite
Composite
Composite
Composite
Composite
Composite
YC
YC
YC
YC
YC
YC
YPrPb
YPrPb
YPrPb
YPrPb
YPrPb
YPrPb
Composite
Composite
Composite
Composite
Composite
YES
Figure 7. Input Muxing Overview
INPUT MUXING; SEE TABLE 9
ADI-RECOMMENDED
Rev. B | Page 14 of 104
ANALOG SIGNALS
CONNECTING
TO ADV7189
Table 9. Input Channel Assignments
Input
Channel
AIN7
AIN1
AIN8
AIN2
AIN9
AIN3
AIN10
AIN4
AIN11
AIN5
AIN12
AIN6
ADI-recommended input muxing is designed to minimize
crosstalk between signal channels and to obtain the highest
level of signal integrity.
out should connect analog video signals to the ADV7189B.
It is strongly recommended to connect any unused analog input
pins to AGND to act as a shield.
Inputs AIN7 to AIN11 should be connected to AGND when
only six input channels are used. This improves the quality
of the sampling due to better isolation between channels.
AIN12 is not under the control of INSEL[3:0]. It can only be
routed to ADC0/ADC1/ADC2 by manual muxing. See
for further details.
(ADC_SW_MAN_EN, ADC0_SW,
USE MANUAL INPUT MUXING
CONFIGURE ADV7189B TO
DECODE VIDEO FORMAT:
ADC1_SW, ADC2_SW)
SET INSEL[3:0] TO
NO
Pin
No.
41
42
43
44
45
46
57
58
59
60
61
62
YPrPb: 1001
CVBS: 0000
YC: 0110
CVBS7
CVBS1
CVBS8
CVBS2
CVBS9
CVBS3
CVBS10
CVBS4
CVBS11
CVBS5
Not Available
CVBS6
ADI Recommended Input Muxing Control
T able 9 summarizes how the PCB lay-
1 4 3 H
INSEL[3:0]
YC1-Y
YC2-Y
YC3-Y
YC1-C
YC2-C
YC3-C
YPrPb1-Y
YPrPb2-Y
YPrPb2-Pb
YPrPb1-Pb
YPrPb1-Pr
YPrPb2-Pr
T able 10
1 4 4 H

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