adv7189b Analog Devices, Inc., adv7189b Datasheet - Page 13

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adv7189b

Manufacturer Part Number
adv7189b
Description
Multiformat Sdtv Video Decoder
Manufacturer
Analog Devices, Inc.
Datasheet

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ANALOG FRONT END
ANALOG INPUT MUXING
The ADV7189B has an integrated analog muxing section that
allows more than one source of video signal to be connected to
the decoder.
muxing provided in the ADV7189B.
As can be seen in
the analog input muxes can be controlled:
x
x
Refer to
controlling the ADV7189B’s input muxing.
Control via functional registers (INSEL). Using INSEL[3:0]
simplifies the setup of the muxes, and minimizes crosstalk
between channels by pre-assigning the input channels.
This is referred to as ADI recommended input muxing.
Control via an I
ADC0_sw, ADC1_sw, ADC2_sw). This is provided for
applications with special requirements, for example,
number/combinations of signals that would not be
served by the pre-assigned input connections. This is
referred to as manual input muxing.
F igure 7 for an overview of the two methods of
1 4 1 H
F igure 6 outlines the overall structure of the input
1 3 9 H
F igure 6, there are two different ways in which
1 4 0 H
2
C manual override (ADC_sw_man_en,
Figure 6. Internal Pin Connections
ADC_SW_MAN_EN
Rev. B | Page 13 of 104
AIN1
AIN7
AIN2
AIN8
AIN3
AIN9
AIN4
AIN10
AIN5
AIN11
AIN6
AIN12
AIN3
AIN9
AIN4
AIN10
AIN5
AIN11
AIN6
AIN12
AIN2
AIN8
AIN5
AIN11
AIN6
AIN12
ADI Recommended Input Muxing
A maximum of 12 CVBS inputs can be connected and decoded
by the ADV7189B. As seen in
have to be connected to adjacent pins on the IC. This calls for a
careful design of the PCB layout, for example, ground shielding
between all signals routed through tracks that are physically
close together.
INSEL[3:0] Input Selection, Address 0x00[3:0]
The INSEL bits allow the user to select an input channel as well
as the input format. Depending on the PCB connections, only
a subset of the INSEL modes are valid. The INSEL[3:0] does
not only switch the analog input muxing, it also configures the
standard definition processor core to process CVBS (Comp),
S-Video (Y/C), or component (YPbPr) format.
1
0
1
0
1
0
ADC0_SW[3:0]
ADC1_SW[3:0]
ADC2_SW[3:0]
INSEL[3:0]
ADC0
ADC1
ADC2
FUNCTIONS
INTERNAL
MAPPING
F igure 5, this means the sources
1 4 2 H
ADV7189B

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