lm8328tmx National Semiconductor Corporation, lm8328tmx Datasheet - Page 44
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lm8328tmx
Manufacturer Part Number
lm8328tmx
Description
Mobile I/o Companion Supporting Keyscan, I/o Expansion Pwm, And Access.bus Host Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM8328TMX.pdf
(58 pages)
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13.7.4 GPIOMIS0 - Masked Interrupt Status Register 0
13.7.5 GPIOMIS1 - Masked Interrupt Status Register 1
13.7.6 GPIOMIS2 - Masked Interrupt Status Register 2
13.8 GPIO WAKE-UP CONTROL
13.8.1 GPIOWAKE0 - GPIO Wake-Up Register 0
Register - Name
Register - Name
Register - Name
Register - Name
KPX[7:0]WAKE
KPY[11:8]MIS
GPIOWAKE0
KPX[7:0]MIS
KPY[7:0]MIS
Bit - Name
Bit - Name
Bit - Name
Bit - Name
GPIOMIS0
GPIOMIS1
GPIOMIS2
(reserved)
Address
Address
Address
Address
0xDA
0xDB
0xD9
0xE9
Bit
7:0
Bit
7:0
Bit
7:4
3:0
Bit
7:0
TABLE 86. GPIOMIS0 - Masked Interrupt Status Register 0
TABLE 87. GPIOMIS1 - Masked Interrupt Status Register 1
TABLE 88. GPIOMIS2 - Masked Interrupt Status Register 2
TABLE 89. GPIOWAKE0 - GPIO Wake-Up Register 0
Default
Default
Default
Default
Type
Type
Type
Type
R/W
0x0
0x0
0x0
0x0
R
R
R
Masked interrupt status on KPX[7:0]
Masked Interrupt status data on KPX[7:0]
0: no interrupt contribution from GPIO
1: interrupt GPIO is active
Masked interrupt status on KPY[7:0]
Masked Interrupt status data on KPY[7:0]
0: no interrupt contribution from GPIO
1: interrupt GPIO is active
Masked interrupt status on KPY[11:8]
(reserved)
Masked Interrupt status data on KPY[11:8]
0: no interrupt contribution from GPIO
1: interrupt GPIO is active
Configures wake-up conditions for KPX[7:0]
Each bit corresponds to a ball. When bit set, the corresponding ball
contributes to wakeup from auto sleep mode.
Bit 7: KPX7
...
Bit 0: KPX0
44
Register Function
Register Function
Register Function
Register Function
Bit Function
Bit Function
Bit Function
Bit Function