lm8328tmx National Semiconductor Corporation, lm8328tmx Datasheet - Page 4
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lm8328tmx
Manufacturer Part Number
lm8328tmx
Description
Mobile I/o Companion Supporting Keyscan, I/o Expansion Pwm, And Access.bus Host Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM8328TMX.pdf
(58 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM8328TMX
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
lm8328tmx/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
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14.0 Absolute Maximum Ratings ........................................................................................................... 46
15.0 Electrical Characteristics ............................................................................................................... 46
16.0 Registers .................................................................................................................................... 49
13.3 INTERFACE CONTROL REGISTERS ..................................................................................... 28
13.4 GPIO FEATURE CONFIGURATION ....................................................................................... 32
13.5 GPIO DATA INPUT/OUTPUT ................................................................................................. 36
13.6 GPIO INTERRUPT CONTROL ............................................................................................... 39
13.7 GPIO INTERRUPT STATUS .................................................................................................. 43
13.8 GPIO WAKE-UP CONTROL .................................................................................................. 44
16.1 REGISTER MAPPING .......................................................................................................... 49
13.2.6 TIMIC - PWM Timer Interrupt Clear Register .................................................................. 26
13.2.7 PWMWP - PWM Timer Pattern Pointer Register ............................................................. 27
13.2.8 PWMCFG - PWM Script Register .................................................................................. 27
13.3.1 I2CSA - I
13.3.2 MFGCODE - Manufacturer Code Register ..................................................................... 28
13.3.3 SWREV - Software Revision Register ............................................................................ 28
13.3.4 SWRESET - Software Reset ........................................................................................ 28
13.3.5 RSTCTRL - System Reset Register .............................................................................. 28
13.3.6 RSTINTCLR - Clear NO Init/Power-On Interrupt Register ................................................. 29
13.3.7 CLKMODE - Clock Mode Register ................................................................................ 29
13.3.8 CLKEN - Clock Enable Register ................................................................................... 30
13.3.9 AUTOSLIP - Autosleep Enable Register ........................................................................ 30
13.3.10 AUTOSLPTI - Auto Sleep Time Register ...................................................................... 30
13.3.11 IRQST - Global Interrupt Status Register ...................................................................... 31
13.4.1 GPIO Feature Mapping ............................................................................................... 32
13.4.2 IOCGF - Input/Output Pin Mapping Configuration Register ............................................... 32
13.4.3 IOPC0 - Pull Resistor Configuration Register 0 ............................................................... 32
13.4.4 IOPC1 - Pull Resistor Configuration Register 1 ............................................................... 33
13.4.5 IOPC2 - Pull Resistor Configuration Register 2 ............................................................... 34
13.4.6 GPIOOME0 - GPIO Open Drain Mode Enable Register 0 ................................................. 34
13.4.7 GPIOOMS0 - GPIO Open Drain Mode Select Register 0 .................................................. 35
13.4.8 GPIOOME1 - GPIO Open Drain Mode Enable Register 1 ................................................. 35
13.4.9 GPIOOMS1 - GPIO Open Drain Mode Select Register 1 .................................................. 35
13.4.10 GPIOOME2 - GPIO Open Drain Mode Enable Register 2 ............................................... 35
13.4.11 GPIOOMS2 - GPIO Open Drain Mode Select Register 2 ................................................ 36
13.5.1 GPIOPDATA0 - GPIO Data Register 0 .......................................................................... 36
13.5.2 GPIOPDATA1 - GPIO Data Register 1 .......................................................................... 37
13.5.3 GPIOPDATA2 - GPIO Data Register 2 .......................................................................... 38
13.5.4 GPIOPDIR0 - GPIO Port Direction Register 0 ................................................................. 39
13.5.5 GPIOPDIR1 - GPIO Port Direction Register 1 ................................................................. 39
13.5.6 GPIOPDIR2 - GPIO Port Direction Register 2 ................................................................. 39
13.6.1 GPIOIS0 - Interrupt Sense Configuration Register 0 ........................................................ 39
13.6.2 GPIOIS1 - Interrupt Sense Configuration Register 1 ........................................................ 40
13.6.3 GPIOIS2 - Interrupt Sense Configuration Register 2 ........................................................ 40
13.6.4 GPIOIBE0 - GPIO Interrupt Edge Configuration Register 0 ............................................... 40
13.6.5 GPIOIBE1 - GPIO Interrupt Edge Configuration Register 1 ............................................... 40
13.6.6 GPIOIBE2 - GPIO Interrupt Edge Configuration Register 2 ............................................... 41
13.6.7 GPIOIEV0 - GPIO Interrupt Edge Select Register 0 ......................................................... 41
13.6.8 GPIOIEV1 - GPIO Interrupt Edge Select Register 1 ......................................................... 41
13.6.9 GPIOIEV2 - GPIO Interrupt Edge Select Register 2 ......................................................... 41
13.6.10 GPIOIE0 - GPIO Interrupt Enable Register 0 ................................................................ 42
13.6.11 GPIOIE1 - GPIO Interrupt Enable Register 1 ................................................................ 42
13.6.12 GPIOIE2 - GPIO Interrupt Enable Register 2 ................................................................ 42
13.6.13 GPIOIC0 - GPIO Clear Interrupt Register 0 .................................................................. 42
13.6.14 GPIOIC1 - GPIO Clear Interrupt Register 1 .................................................................. 42
13.6.15 GPIOIC2 - GPIO Clear Interrupt Register 2 .................................................................. 43
13.7.1 GPIORIS0 - Raw Interrupt Status Register 0 .................................................................. 43
13.7.2 GPIORIS1 - Raw Interrupt Status Register 1 .................................................................. 43
13.7.3 GPIORIS2 - Raw Interrupt Status Register 2 .................................................................. 43
13.7.4 GPIOMIS0 - Masked Interrupt Status Register 0 ............................................................. 44
13.7.5 GPIOMIS1 - Masked Interrupt Status Register 1 ............................................................. 44
13.7.6 GPIOMIS2 - Masked Interrupt Status Register 2 ............................................................. 44
13.8.1 GPIOWAKE0 - GPIO Wake-Up Register 0 ..................................................................... 44
13.8.2 GPIOWAKE1 - GPIO Wake-Up Register 1 ..................................................................... 45
13.8.3 GPIOWAKE2 - GPIO Wake-Up Register 2 ..................................................................... 45
16.1.1 Keyboard Registers .................................................................................................... 49
2
C-Compatible ACCESS.bus Slave Address Register ......................................... 28
4