tda8358j-n2 NXP Semiconductors, tda8358j-n2 Datasheet - Page 4

• Manufacturer Part Number: tda8358j-n2
• Description: Full Bridge Vertical Deflection Output Circuit In Lvdmos With East-west Amplifier
• Manufacturer: NXP Semiconductors

Philips Semiconductors
PINNING
2002 Sep 25
handbook, halfpage
INA
INB
V
OUTB
INEW
VGND
EWGND
OUTEW
V
OUTA
GUARD
FEEDB
COMP
P
FB
Full bridge vertical deflection output circuit
in LVDMOS with east-west amplifier
SYMBOL
The die has been glued to the metal block of the package. If the metal
block is not insulated from the heatsink, the heatsink shall only be
connected directly to pin VGND.
EWGND
OUTEW
GUARD
FEEDB
COMP
VGND
OUTB
OUTA
INEW
V FB
Fig.2 Pin configuration.
INA
INB
PIN
V P
10
11
12
13
1
2
3
4
5
6
7
8
9
10
11
12
13
1
2
3
4
5
6
7
8
9
positive vertical input
negative vertical input
supply voltage
vertical output voltage B
east-west input voltage
vertical ground
east-west ground
east-west output voltage
flyback supply voltage
vertical output voltage A
guard output voltage
input measuring resistor
input compensation current
TDA8358J
MGL867
DESCRIPTION
4
FUNCTIONAL DESCRIPTION
Vertical output stage
The vertical driver circuit has a bridge configuration. The
deflection coil is connected between the complimentary
driven output amplifiers. The differential input circuit is
voltage driven. The input circuit is specially designed for
direct connection to driver circuits delivering a differential
signal but it is also suitable for single-ended applications.
For processors with output currents, the currents are
converted to voltages by the conversion resistors
R
and INB. The differential input voltage is compared with
the voltage across the measuring resistor R
providing feedback information. The voltage across R
proportional with the output current. The relationship
between the differential input voltage and the output
current is defined by:
V
The output current should not exceed 3.2 A (p-p) and is
determined by the value of R
input voltage range is 100 mV to 1.6 V for each input. The
formula given does not include internal bondwire
resistances. Depending on the value of R
bondwire resistance (typical value 50 m ) the actual value
of the current in the deflection coil will be about 5% lower
than calculated.
Flyback supply
The flyback voltage is determined by the flyback supply
voltage V
allows to use an optimum supply voltage V
an optimum flyback supply voltage V
very high efficiency is achieved. The available flyback
output voltage across the coil is almost equal to V
to the absence of a coupling capacitor which is not
required in a bridge configuration. The very short rise and
fall times of the flyback switch are determined mainly by
the slew rate value of more than 300 V/ s.
Protection
The output circuit contains protection circuits for:
i(dif)(p-p)
CV1
Too high die temperature
Overvoltage of output A.
and R
FB
I
o(p-p)
CV2
. The principle of two supply voltages (class G)
(see Fig.3) connected to pins INA
R
M
; V
i(dif)(p-p)
M
and R
V
INA
FB
Product specification
CV
TDA8358J
. The allowable
for flyback, thus
M
V
INB
and the internal
P
M
for scan and
, thus
FB
, due
M
is