tda8004at-c1 NXP Semiconductors, tda8004at-c1 Datasheet - Page 7

• Manufacturer Part Number: tda8004at-c1
• Description: Ic Card Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
TDA8004AT_3
Product data sheet
8.4 I/O circuitry
Table 4.
The three data lines I/O, AUX1 and AUX2 are identical.
The idle state is realized by data lines I/O and I/OUC being pulled HIGH via a 10 k
resistor (I/O to V
I/O is referenced to V
The first line on which a falling edge occurs becomes the master. An anti-latch circuit
disables the detection of falling edges on the other line, which then becomes the slave.
After a time delay t
turned on, thus transmitting the logic 0 present on the master line.
When the master line returns to logic 1, the P transistor on the slave line is turned on
during the time delay t
This active pull-up feature ensures fast LOW-to-HIGH transitions; it is able to deliver more
than 1 mA up to an output voltage of 0.9V
pull-up pulse, the output voltage only depends on the internal pull-up resistor, and on the
load current (see
The maximum frequency on these lines is 1 MHz.
CLKDIV1
0
0
1
1
Clock circuitry definition
CC
Figure
d(edge)
and I/OUC to V
CC
Rev. 03 — 9 February 2006
d(edge)
, and I/OUC to V
4).
(approximately 200 ns), the N transistor on the slave line is
and then both lines return to their idle states.
CLKDIV2
0
1
1
0
DD
).
DD
CC
, thus allowing operation with V
on a 80 pF load. At the end of the active
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
CLK
1
1
1
f
XTAL
8
4
2
f
f
f
XTAL
XTAL
XTAL
TDA8004AT
IC card interface
CC
V
DD
.
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