tda8755t NXP Semiconductors, tda8755t Datasheet - Page 11

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tda8755t

Manufacturer Part Number
tda8755t
Description
Yuv 8-bit Video Low-power Analog-to-digital Interface
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
1995 Mar 09
handbook, full pagewidth
handbook, full pagewidth
YUV 8-bit video low-power
analog-to-digital interface
output
The output data is valid 4 clock periods after HREF goes HIGH.
When the HREF period is a multiple of 4 clock periods, the output data is valid without any clock delay.
The internal circuit always gives an internal delay of 4 clock periods as illustrated in Fig.6.
HREF
data
CLK
HREF
output
data
CLK
N 4
sample N
N 4
t su
sample N
N 3
1
N 3
Fig.6 Timing definition for set-up and hold times (HREF signal).
2
N 3
N 2
4 clock periods (T
Fig.7 Timing diagram (HREF signal).
3
N 1
clk
4
)
N
11
sample N
output data valid
sample N 4
5
sample N 4 (T
output data valid
sample N 4 x T
clk
clk
1)
Product specification
t h
TDA8755
MLA731 - 1
MLA732 - 1

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