m41t81s STMicroelectronics, m41t81s Datasheet - Page 20

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m41t81s

Manufacturer Part Number
m41t81s
Description
Serial Access Real-time Clock With Alarms
Manufacturer
STMicroelectronics
Datasheet

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Century bit
Battery low warning
Oscillator fail detection
20/31
Bits D7 and D6 of Clock Register 03h contain the CENTURY ENABLE Bit (CEB) and the
CENTURY Bit (CB). Setting CEB to a '1' will cause CB to toggle, either from a '0' to '1' or
from '1' to '0' at the turn of the century (depending upon its initial state). If CEB is set to a '0,'
CB will not toggle.
The M41T81S automatically performs battery voltage monitoring upon power-up and at
factory-programmed time intervals of approximately 24 hours. The Battery Low (BL) Bit, Bit
D4 of Flags Register 0Fh, will be asserted if the battery voltage is found to be less than
approximately 2.5V. The BL Bit will remain asserted until completion of battery replacement
and subsequent battery low monitoring tests, either during the next power-up sequence or
the next scheduled 24-hour interval.
If a battery low is generated during a power-up sequence, this indicates that the battery is
below approximately 2.5 volts and may not be able to maintain data integrity. Clock data
should be considered suspect and verified as correct. A fresh battery should be installed.
If a battery low indication is generated during the 24-hour interval check, this indicates that
the battery is near end of life. However, data is not compromised due to the fact that a
nominal V
battery back-up mode, the battery should be replaced.
The M41T81S only monitors the battery when a nominal V
applications which require extensive durations in the battery back-up mode should be
powered-up periodically (at least once every few months) in order for this technique to be
beneficial. Additionally, if a battery low is indicated, data integrity should be verified upon
power-up via a checksum or other technique.
If the Oscillator Fail Bit (OF) is internally set to '1,' this indicates that the oscillator has either
stopped, or was stopped for some period of time and can be used to judge the validity of the
clock and date data.
In the event the OF Bit is found to be set to '1' at any time other than the initial power-up, the
STOP Bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the
oscillator.
The following conditions can cause the OF Bit to be set:
The OF Bit will remain set to '1' until written to logic '0.' The oscillator must start and have
run for at least 4 seconds before attempting to reset the OF Bit to '0.'
The first time power is applied (defaults to a '1' on power-up).
The voltage present on V
The ST Bit is set to '1.'
External interference of the crystal.
CC
is supplied. In order to insure data integrity during subsequent periods of
CC
is insufficient to support oscillation.
CC
is applied to the device. Thus

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