pca82c200t NXP Semiconductors, pca82c200t Datasheet - Page 44
pca82c200t
Manufacturer Part Number
pca82c200t
Description
8-bit Microcontroller With On-chip Can
Manufacturer
NXP Semiconductors
Datasheet
1.PCA82C200T.pdf
(108 pages)
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Philips Semiconductors
13.5.10 B
The contents of Bus Timing Register 1 defines the length
of the bit period, the location of the sample point and the
number of samples to be taken at each sample point.
Table 47 Bus Timing Register 1 (address 7)
Table 48 Description of the BTR1 bits
1996 Jun 27
8-bit microcontroller with on-chip CAN
SAM
BIT
7
7
6
5
4
3
2
1
0
US
T
IMING
SAM
SYMBOL
TSEG2.2
TSEG2.2
TSEG2.1
TSEG2.0
TSEG1.3
TSEG1.2
TSEG1.1
TSEG1.0
R
6
EGISTER
Sampling. If the bit SAM is:
Time Segment 1 (TSEG1) and Time Segment 2 (TSEG2).
TSEG1 determines the number of clock cycles per bit period and the location of the
sample point:
TSEG2 determines the number of clock cycles per bit period and the location of the
sample point:
1(BTR1)
TSEG2.1
HIGH (3 samples), then three samples are taken. This is recommended for
slow/medium speed buses (SAE class A and B) where filtering of spikes on the
bus-line is beneficial (see Section 13.5.19.6).
LOW (1 sample), the bus is sampled once.
This is recommended for high speed buses (SAE class C).
5
t
t
TSEG1
TSEG2
TSEG2.0
4
=
=
t
t
SCL
SCL
44
8TSEG1.3
4TSEG2.2
This register can be accessed (read/write) if the Reset
Request bit is set HIGH (present).For further information
on bus timing, see Sections 13.5.9 and 13.5.18.
TSEG1.3
3
FUNCTION
+
+
4TSEG1.2
2TSEG2.1
TSEG1.2
2
+
+
2TSEG1.1
TSEG2.0
TSEG1.1
1
+
+
Product specification
1
TSEG1.0
P8xCE598
TSEG1.0
+
0
1
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