pca8565a NXP Semiconductors, pca8565a Datasheet - Page 23

• Manufacturer Part Number: pca8565a
• Description: Real-time Clock/calendar
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA8565A_2
Product data sheet
Fig 13. System configuration
SCL
SDA
TRANSMITTER
9.4 Acknowledge
RECEIVER
MASTER
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
Acknowledgement on the I
Fig 14. Acknowledgement on the I
•
•
•
•
A slave receiver, which is addressed, must generate an acknowledge after the
reception of each byte.
Also a master receiver must generate an acknowledge after the reception of each
byte that has been clocked out of the slave transmitter.
The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
by transmitter
data output
by receiver
data output
SCL from
master
RECEIVER
SLAVE
condition
START
Rev. 02 — 4 December 2009
S
2
C-bus is shown in
TRANSMITTER
RECEIVER
SLAVE
1
2
C-bus
Figure
2
TRANSMITTER
MASTER
14.
not acknowledge
acknowledge
Real-time clock/calendar
8
TRANSMITTER
PCA8565A
RECEIVER
MASTER
acknowledgement
clock pulse for
© NXP B.V. 2009. All rights reserved.
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