pca8565a NXP Semiconductors, pca8565a Datasheet - Page 18
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pca8565a
Manufacturer Part Number
pca8565a
Description
Real-time Clock/calendar
Manufacturer
NXP Semiconductors
Datasheet
1.PCA8565A.pdf
(38 pages)
NXP Semiconductors
PCA8565A_2
Product data sheet
8.9 EXT_CLK test mode
Table 27.
The timer register is an 8-bit binary countdown timer. It is enabled or disabled via the
Timer_control register. The source clock for the timer is also selected by the Timer_control
register. Other timer properties such as single or periodic interrupt generation are
controlled via the register Control_status_2 (address 01h).
For accurate read back of the count down value, it is recommended to read the register
twice and check for consistent results, since it is not possible to freeze the countdown
timer counter during read back.
A test mode is available which allows for on-board testing. In such a mode it is possible to
set up test conditions and control the operation of the RTC.
The test mode is entered by setting bit TEST1 in register Control_status_1. Then
pin CLKOUT becomes an input. The test mode replaces the internal 64 Hz signal with the
signal applied to pin CLKOUT. Every 64 positive edges applied to pin CLKOUT will then
generate an increment of one second.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a
maximum period of 1000 ns. The internal 64 Hz clock, now sourced from CLKOUT, is
divided down to 1 Hz by a 2
a known state by using the bit STOP. When the STOP bit is set, the prescaler is reset to
logic 0 (STOP must be cleared before the prescaler can operate again).
From a STOP condition, the first 1 second increment will take place after 32 positive
edges on pin CLKOUT. Thereafter, every 64 positive edges will cause a one-second
increment.
Remark: Entry into EXT_CLK test mode is not synchronized to the internal 64 Hz clock.
When entering the test mode, no assumption as to the state of the prescaler can be
made.
Operation example:
Repeat steps 7 and 8 for additional increments.
Bit
7
128
1. Set EXT_CLK test mode (Control_status_1, bit TEST1 = 1).
2. Set bit STOP (Control_status_1, bit STOP = 1).
3. Clear bit STOP (Control_status_1, bit STOP = 0).
4. Set time registers to desired value.
5. Apply 32 clock pulses to pin CLKOUT.
6. Read time registers to see the first change.
7. Apply 64 clock pulses to pin CLKOUT.
8. Read time registers to see the second change.
Timer register bits value range
6
64
Rev. 02 — 4 December 2009
5
32
6
divide chain called a prescaler. The prescaler can be set into
4
16
3
8
2
4
Real-time clock/calendar
PCA8565A
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2
© NXP B.V. 2009. All rights reserved.
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