pca8565a NXP Semiconductors, pca8565a Datasheet
pca8565a
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pca8565a Summary of contents
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... PCA8565A Real-time clock/calendar Rev. 02 — 4 December 2009 1. General description The PCA8565A is a CMOS consumption. A programmable clock output, interrupt output, and voltage-low detector are also provided. All addresses and data are transferred serially via a two-line bidirectional 2 I C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte ...
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... PCA8565AU/5BB/1 PCA8565A_2 Product data sheet Ordering information Package Name Description [1] PCA8565AU wire bond die; 9 bonding pads PCA8565AU wire bond die; 9 bonding pads Marking codes Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar Delivery form unsawn wafer; thickness 280 m unsawn wafer; thickness 280 m ...
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... Block diagram OSCI C OSCI OSCILLATOR 32.768 kHz OSCO C OSCO MONITOR POWER ON RESET WATCH DOG 2 SDA I C-BUS INTERFACE SCL PCA8565A Fig 1. Block diagram of PCA8565A PCA8565A_2 Product data sheet DIVIDER CONTROL 00 CONTROL_STATUS_1 01 CONTROL_STATUS_2 0D CLKOUT_CONTROL TIME 02 VL_SECONDS 03 MINUTES 04 HOURS 05 DAYS 06 WEEKDAYS 07 CENTURY_MONTHS ...
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... The substrate (rear side of the die) is wired to V PCA8565A_2 Product data sheet OSCI 1 OSCO 2 3 INT Viewed from active side. For mechanical details, see Pin configuration for PCA8565A Pin description Pin Description 1 oscillator input 2 oscillator output 3 interrupt output (open-drain; active LOW) 4 ground supply voltage 5 ...
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... NXP Semiconductors 8. Functional description The PCA8565A contains 16 8-bit registers with an auto-incrementing address register, an on-chip 32.768 kHz oscillator with two integrated capacitors, a frequency divider which provides the source clock for the RTC, a programmable clock output, a timer, an alarm, a voltage low detector, and a 400 kHz I All 16 registers (see not all bits are implemented. The fi ...
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... HOURS ( DAYS ( YEARS (0 to 99) AE_M MINUTE_ALARM (0 to 59) AE_H - HOUR_ALARM (0 to 23) AE_D - DAY_ALARM (1 to 31) AE_W - - - - - TIMER Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar TESTC N TI_TP WEEKDAYS ( MONTH ( WEEKDAY_ALARM ( AIE TIE FD TD © ...
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... Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar (subject to the status of TIE); © NXP B.V. 2009. All rights reserved. Reference Section 8.9 Section 8.10 Section 8 ...
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... Bit interface: TF: TIMER read TF SET PULSE CLEAR GENERATOR 2 TRIGGER CLEAR to interface: AF: ALARM read AF FLAG SET CLEAR These bits activate or deactivate the generation of an interrupt when Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar TI_TP TIE 0 1 ...
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... The pulse generator for the countdown timer interrupt Table 9). [1] INT operation (bit TI_TP = 1) INT period (s) [ 8192 1 128 Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar [2] n > 4096 © NXP B.V. 2009. All rights reserved ...
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... Voltage-low detector and clock monitor The PCA8565A has an on-chip voltage-low detector (see below V clock information is no longer guaranteed. The VL flag can only be cleared by using the interface. Fig 4. PCA8565A_2 Product data sheet VL_seconds - seconds and clock integrity status register (address 02h) bit ...
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... Register Days Table 14. Bit Symbol DAYS [1] The PCA8565A compensates for leap years by adding a 29th day to February if the year counter contains a value which is exactly divisible by 4, including the year 00. 8.4.5 Register Weekdays Table 15. Bit Symbol WEEKDAYS ...
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... Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar indicates the century is x indicates the century unused actual month coded in BCD format, see Bit 2 ...
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... Hz clock tick. LEAP YEAR CALCULATION Data flow for the time function Figure 6). Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar actual year coded in BCD format 1 Hz tick SECONDS MINUTES HOURS DAYS ...
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... Read Weekdays. 10. Read Century_months. 11. Read Years. 12. Send a STOP condition. PCA8565A_2 Product data sheet START SLAVE ADDRESS Access time for read/write operations Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar t < DATA DATA STOP © NXP B.V. 2009. All rights reserved. 013aaa215 ...
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... BCD format Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar minute alarm is enabled minute alarm is disabled minute alarm information coded in BCD format hour alarm is enabled hour alarm is disabled unused hour alarm information coded in BCD ...
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... HOUR TIME DAY ALARM = DAY TIME WEEKDAY ALARM = WEEKDAY TIME It’s only on increment to a matched case that the alarm flag is set, see Alarm function block diagram Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar example AE_M AE_M = AE_H (1) set alarm flag AF ...
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... Hz for power saving. Timer - timer register (address 0Fh) bit description Value 00h to FFh countdown period in seconds: Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar Description unused frequency output at pin CLKOUT 32.768 kHz 1.024 kHz Hz) and enables or disables the timer. The timer ...
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... Repeat steps 7 and 8 for additional increments. PCA8565A_2 Product data sheet Timer register bits value range divide chain called a prescaler. The prescaler can be set into Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar © NXP B.V. 2009. All rights reserved ...
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... Product data sheet OSCILLATOR STOP DETECTOR RESET 8192 Hz stop released STOP bit release timing Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar held in reset and 2 14 Figure 8). The time circuits can then be set and Figure 9 and Table reset F F ...
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... The first increment of the time circuits is between 0.507813 s and 0.507935 s after STOP bit is released. The uncertainty is caused by the prescaler bits F (see Table 8.11 Reset The PCA8565A includes an internal reset circuit which is active whenever the oscillator is stopped. In the reset state the I all registers are set according to reset. PCA8565A_2 ...
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... Day_alarm 1 x Weekday_alarm 1 x CLKOUT_control x x Timer_control 0 x Timer C-bus pins, SDA and SCL, be toggled in a specific order as shown in 500 ns 2000 ns Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar ...
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... PCA8565A_2 Product data sheet 2 C-bus Figure SDA SCL data line stable; data valid Figure 12. S START condition Figure Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar 11). change of data allowed mbc621 P STOP condition 13). © NXP B.V. 2009. All rights reserved. SDA SCL mbc622 ...
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... TRANSMITTER RECEIVER RECEIVER 2 C-bus is shown in data output data output by receiver SCL from 1 master S START condition 2 C-bus Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar MASTER MASTER TRANSMITTER TRANSMITTER RECEIVER mba605 Figure 14. not acknowledge acknowledge clock pulse for acknowledgement © NXP B.V. 2009. All rights reserved. ...
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... The addressing is always carried out with the first byte transmitted after the start procedure. The PCA8565A acts as a slave receiver or slave transmitter. Therefore, the clock signal SCL is only an input signal, but the data signal SDA is a bidirectional line. Two slave addresses are reserved for the PCA8565A: ...
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... During read/write operations, the time counting circuits are frozen. To prevent a situation where the accessing device becomes locked and does not clear the interface, the PCA8565A has a built in watchdog timer. Should the interface be active for more than 1 s from the time a valid slave address is transmitted, then the PCA8565A will automatically clear the interface and allow the time counting circuits to continue counting ...
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... NXP Semiconductors 10. Internal circuitry Fig 19. Device diode protection PCA8565A_2 Product data sheet 1 OSCI 2 OSCO 3 INT PCA8565A 001aab724 Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar 9 CLKOE CLKOUT 6 SCL 5 SDA © NXP B.V. 2009. All rights reserved ...
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... HBM voltage die type 1 die type 2 MM die type 1 die type 2 latch-up current all pins but OSCI storage temperature Ref. 7 “JESD78” = +125 C). Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar Min 0 0 [2] - ...
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... C amb amb +85 C amb Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar = pF; unless otherwise s L Min Typ Max 1 5.5 low - 100 250 - 25 100 [1][2] - 1100 1800 - 1000 1600 - ...
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... output sink current 0 pin SDA pin INT pin CLKOUT Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar = pF; unless otherwise s L Min Typ [1][2] - 1300 - 1100 - 1000 - 1100 - 900 - 800 - 900 ...
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... Conditions V = 200 mV [3][4] of SCL and SDA signals of SCL and SDA signals tolerable , is a calculation of C and C OSCI OSCO Ref. 10 “UM10204”. Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar = pF; unless s L Min Typ [ 0.2 amb [ ...
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... BUF LOW t HD;STA C-bus timing waveforms SCL CLOCK/CALENDAR OSCI PCA8565A SDA OSCO V SS Connect CLKOE to an appropriate level. Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar HD;DAT t HIGH t SU;STA V DD SDA MASTER TRANSMITTER/ RECEIVER SCL SDA ...
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... 0.9 0.1 0.09 0.1 0.09 References JEDEC JEITA Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar detail X 0 0.5 scale European projection PCA8565AU pca8565au_do Issue date 09-08-29 09-09-09 © NXP B.V. 2009. All rights reserved ...
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... REF C1 REF Alignment mark description Figure 22. Size ( m) 100 100 100 100 90 117 Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar X Y 523.0 m 689.4 m 523.0 m 469.4 m 523.0 m 429.8 m 523.0 m 684.4 m 524.9 m 523.8 m 524.9 m 138.6 m 524.9 m 162.5 m 524.9 m 443.3 m 524.9 m 716.3 m ...
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... Bad die are inked out. Fig 24. Wafer layout PCA8565A_2 Product data sheet die type die type die type die type Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar Saw lane Seal ring plus gap to active circuit ~18 m detail X X © ...
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... Human Body Model Inter-Integrated Circuit Integrated Circuit Machine Model Metal Oxide Semiconductor Most Significant Bit Power-On Reset Real Time Clock Serial Clock Line Serial Data Line Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar © NXP B.V. 2009. All rights reserved ...
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... UM10204 — I 20. Revision history Table 36. Revision history Document ID Release date PCA8565A_2 20091204 • Modifications: Added new product type PCA8565AU/5BB/1 PCA8565A_1 20080222 PCA8565A_2 Product data sheet 2 C-bus specification and user manual Data sheet status Change notice Product data sheet ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 4 December 2009 PCA8565A Real-time clock/calendar © NXP B.V. 2009. All rights reserved ...
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... Static characteristics . . . . . . . . . . . . . . . . . . . 28 Dynamic characteristics . . . . . . . . . . . . . . . . . 30 Application information . . . . . . . . . . . . . . . . . 31 Bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 32 Handling information . . . . . . . . . . . . . . . . . . . 33 Packing information . . . . . . . . . . . . . . . . . . . . 34 Wafer information . . . . . . . . . . . . . . . . . . . . . . 34 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 35 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Revision history . . . . . . . . . . . . . . . . . . . . . . . 36 Legal information . . . . . . . . . . . . . . . . . . . . . . 37 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 37 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Disclaimers Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Contact information . . . . . . . . . . . . . . . . . . . . 37 Contents Date of release: 4 December 2009 Document identifier: PCA8565A_2 All rights reserved. ...