pcf85162 NXP Semiconductors, pcf85162 Datasheet - Page 29

• Manufacturer Part Number: pcf85162
• Description: Universal Lcd Driver For Low Multiplex Rates
• Manufacturer: NXP Semiconductors

NXP Semiconductors
12. Application information
PCF85162_1
Product data sheet
12.1 Cascaded operation
The PCF85162 allows to be cascaded to drive larger display configurations with up to 16
PCF85162 devices on the same I
source is used, one PCF85162 must act as the clock master, generating the clock,
whereas all remaining PCF85162 in the cascade must act as clock slaves, receiving the
clock from the master (see
PCF85162 in the cascade must act as clock slaves, receiving the clock from the external
clock source.
A PCF85162 is configured as a clock master by connecting pin OSC to V
Section
signal which is output on pin CLK.
The other way round a PCF85162 is configured as clock slave by connecting pin OSC to
V
CLK.
Up to 16 PCF85162 can be distinguished by using the 3-bit hardware subaddress
(A0, A1, and A2) and the programmable I
Table 18.
When cascaded PCF85162 are synchronized, they can share the backplane signals from
one of the devices in the cascade. Such an arrangement is cost-effective in large LCD
applications since the backplane outputs of only one device need to be through-plated to
the backplane electrodes of the display. The other PCF85162 of the cascade contribute
additional segment outputs, but their backplane outputs are left open-circuit
(see
Cluster
1
2
DD
(see
Figure
7.5.1). In this case the internal oscillator of the PCF85162 is generating the clock
Section
Addressing cascaded PCF85162
20).
Bit SA0
0
1
7.5.2). In this case the PCF85162 is expecting a clock signal on pin
Rev. 01 — 7 January 2010
Figure
Pin A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
20). Alternatively, if an external clock source is used, all
C-bus. In such a configuration, if no external clock
2
C-bus slave address (SA0).
Universal LCD driver for low multiplex rates
Pin A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Pin A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
PCF85162
© NXP B.V. 2010. All rights reserved.
SS
Device
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
(see
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