mc145201dt Freescale Semiconductor, Inc, mc145201dt Datasheet - Page 18

• Manufacturer Part Number: mc145201dt
• Description: 2.0 Ghz Pll Frequency Synthesizers
• Manufacturer: Freescale Semiconductor, Inc

MC145200 MC145201
18
NOTE:
NOTE:
* The R and V outputs are fed to an external combiner/loop filter. The R and V outputs swing rail–to–rail. Therefore, the user should be careful
DEFINITIONS:
RECOMMENDED READING:
not to exceed the common mode input range of the op amp used in the combiner/loop filter.
f R is the frequency at the phase detector input. Larger n values result in faster loop lock times and, for similar sideband filtering, higher
f R –related VCO sidebands.
tional filtering may be active or passive.
For (A), using K in amps per radian with the filter’s impedance transfer function, Z(s), maintains units of volts per radian for the detector/
filter combination. Additional sideband filtering can be accomplished by adding a capacitor C across R. The corner c = 1/RC should be
chosen such that n is not significantly affected.
For (B), R 1 is frequently split into two series resistors; each resistor is equal to R 1 divided by 2. A capacitor C C is then placed from the
midpoint to ground to further filter the error pulses. The value of C C should be such that the corner frequency of this network does not
significantly affect n .
AN535, Phase–Locked Loop Design Fundamentals, Motorola Semiconductor Products, Inc., 1970.
AR254, Phase–Locked Loop Design Articles, Motorola Semiconductor Products, Inc., Reprinted with permission from Electronic Design,
N = Total Division Ratio in Feedback Loop
K (Phase Detector Gain) = I PDout / 2 amps per radian for PD out
K (Phase Detector Gain) = V PD / 2 volts per radian for V and R
K VCO (VCO Transfer Function) =
Gardner, Floyd M., Phaselock Techniques (second edition). New York, Wiley–Interscience, 1979.
Manassewitsch, Vadim, Frequency Synthesizers: Theory and Design (second edition). New York, Wiley–Interscience, 1980.
Blanchard, Alain, Phase–Locked Loops: Application to Coherent Receiver Design. New York, Wiley–Interscience, 1976.
Egan, William F., Frequency Synthesis by Phase Lock. New York, Wiley–Interscience, 1981.
Rohde, Ulrich L., Digital PLL Frequency Synthesizers Theory and Design. Englewood Cliffs, NJ, Prentice–Hall, 1983.
Berlin, Howard M., Design of Phase–Locked Loop Circuits, with Experiments. Indianapolis, Howard W. Sams and Co., 1978.
Kinley, Harold, The PLL Synthesizer Cookbook. Blue Ridge Summit, PA, Tab Books, 1980.
Seidman, Arthur H., Integrated Circuits Applications Handbook , Chapter 17, pp. 538–586. New York, John Wiley & Sons.
Fadrhons, Jan, “Design and Analyze PLLs on a Programmable Calculator,” EDN . March 5, 1980.
AN1253/D, An Improved PLL Design Method Without n and , Motorola Semiconductor Products, Inc., 1995.
For a nominal design starting point, the user might consider a damping factor
Either loop filter (A) or (B) is frequently followed by additional sideband filtering to further attenuate f R –related VCO sidebands. This addi-
1987.
(A)
(B)
R
V
PD out
C
R
R 1
R 1
PHASE–LOCKED LOOP — LOW–PASS FILTER DESIGN
C
2
V VCO
R 2
f VCO
VCO
–
+
R 2
A
radians per volt
C
VCO
Z(s) =
ASSUMING GAIN A IS VERY LARGE, THEN:
F(s) =
n =
0.7 and a natural loop frequency n (2 f R /50) where
n =
=
=
R 2 sC + 1
R
2
1 + sRC
n R 2 C
R 1 sC
sC
2
K K VCO
K K VCO
NCR 1
K
NC
K VCO C
N
=
n RC
2
MOTOROLA