mk2069-02 Integrated Device Technology, mk2069-02 Datasheet - Page 7

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mk2069-02

Manufacturer Part Number
mk2069-02
Description
Vcxo-based Clock Jitter Attenuator And Translator
Manufacturer
Integrated Device Technology
Datasheet
also increase output clock jitter when there is excess digital
noise in the system application, due to the reduced ability of
the PLL to respond to and therefore compensate for phase
noise ingress.
Notes on setting the value of C
As another general rule, the following relationship should be
maintained between components C
filter:
C
For higher damping factors (> 1), calculate the value of C
based on a C
of 1. This will minimize baseband peaking and loop
Graph of Charge Pump Current vs. Value of R
IDT® VCXO-BASED CLOCK JITTER ATTENUATOR AND TRANSLATOR
P
MK2069-02
VCXO-BASED CLOCK JITTER ATTENUATOR AND TRANSLATOR
establishes a second pole in the VCXO PLL loop filter.
C
P
=
C
----- -
20
S
S
value that would be used for a damping factor
100E-6
10E-6
1E-3
100E+3
S
and C
P
P
in the loop
P
R
SET
SET
1E+6
7
, ohms
instability that can lead to output jitter.
C
charge pump correction pulses. A C
will result in increased output phase noise at the phase
detector frequency due to this. In extreme cases where
input jitter is high, charge pump current is high, and C
small, the VCXO input voltage can hit the supply or ground
rail resulting in non-linear loop response.
The best way to set the value of C
response software available from ICS (please refer to the
following section). C
just starts affecting the passband peak.
Loop Filter Response Software
Online tools to calculate loop filter response can be found at
www.idt.com/?app=calculators&source=support_menu.
(external resistor)
P
also damps VCXO input voltage modulation by the
Recommended Range
P
of Operation
should be increased in value until it
VCXO AND SYNTHESIZER
P
MK2069-02
is to use the filter
P
10E+6
value that is too low
REV G 050203
P
is too

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