mk2069-02 Integrated Device Technology, mk2069-02 Datasheet - Page 18

• Manufacturer Part Number: mk2069-02
• Description: Vcxo-based Clock Jitter Attenuator And Translator
• Manufacturer: Integrated Device Technology

AC Electrical Characteristics
IDT® VCXO-BASED CLOCK JITTER ATTENUATOR AND TRANSLATOR
MK2069-02
VCXO-BASED CLOCK JITTER ATTENUATOR AND TRANSLATOR
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85 C
Crystal Frequency Range
(Note 1)
VCXO Crystal Pull Range
VCXO Crystal Free-Run
Frequency (Note 2)
Input Clock Frequency (Note 3)
Input Clock Pulse Width
VCXO PLL Phase Detector
Frequency
Phase Detector Jitter Tolerance
Timing Jitter, Filtered
500Hz-1.3MHz (OC-3)
Timing Jitter, Filtered
65kHz-5MHz (OC-3)
Timing Jitter, Filtered
1kHz-5MHz (OC-12)
Timing Jitter, Filtered
250kHz-5MHz (OC-12)
Output Frequency
Output Duty Cycle (% high time),
VCLK when SV Divider = 1
Output Duty Cycle (% high time),
VCLK when SV Divider > 1,
TCLK
Output High Time, RCLK
(Note 4)
Output Rise Time, VCLK and
RCLK
Parameter
Symbol
f
XTAL
t
t
t
t
t
t
t
t
f
f
f
t
t
OJf
OJf
OJf
OJf
PD
OD
OD
OH
OR
XP
XF
JT
f
ID
I
Using recommended
crystal
Using recommended
crystal
Input reference = 0 Hz
Positive or Negative
Pulse
1 UI = phase detector
period
Derived from phase
noise characteristics,
peak-to-peak 6 sigma
Derived from phase
noise characteristics,
peak-to-peak 6 sigma
Derived from phase
noise characteristics,
peak-to-peak 6 sigma
Derived from phase
noise characteristics,
peak-to-peak 6 sigma
VCO frequency = 40 to
320 MHz
Measured at VDD/2,
C
Measured at VDD/2,
C
Measured at VDD/2,
C
0.8 to 2.0V, C
L
L
L
=15pF
=15pF
=15pF
Conditions
18
L
=15pF
0.002
0.001
±115
Min.
13.5
-300
2.5
10
40
44
Period
VCLK
Typ.
±150
-150
105
0.4
0.5
1.5
95
85
80
50
50
VCXO AND SYNTHESIZER
MK2069-02
Max. Units
160
27
27
27
60
65
2
MHz
MHz
nsec
MHz
MHz
ppm
ppm
UI
ps
ps
ps
ps
ns
%
%
REV G 050203