nb7vpq16m ON Semiconductor, nb7vpq16m Datasheet - Page 3

• Manufacturer Part Number: nb7vpq16m
• Description: 1.8v / 2.5v Cml 12.5 Gbps Programmable Pre-emphasis Copper/cable Driver With Selectable Equalizer Receiver
• Manufacturer: ON Semiconductor

1. In the differential configuration when the input termination pin (V
2. All V
Table3. Pin Description
Pin
EP
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
input signal is applied on IN/INb input, then the device will be susceptible to self-oscillation. Q/Qb outputs have internal 50-ohm source
termination resistor.
CC,
V
SCLKOUT
CCD
SCLKIN
SDOUT
SLOAD
VCCD
Name
SDIN
GND
GND
VCC
VCC
VCC
INb
Qb
VT
IN
and GND pins must be externally connected to external power supply voltage to guarantee proper device operation.
Q
LVCMOS Output
LVCMOS Output
LVPECL, CML,
LVPECL, CML,
LVCMOS Input
LVCMOS Input
LVCMOS Input
LVDS Input
LVDS Input
CML
CML
I/O
-
-
-
-
-
-
GND
VT
IN
INb
Figure 4. NB7VPQ16M Pinout: QFN-16 (Top View)
1
2
3
4
Non-inverted Differential Clock/Data Input. Note 1
Inverted Differential Clock/Data Input. Note 1
Negative Supply Voltage; Note 2
Positive Supply Voltage for Serial Bus Logic and 5-Bit DAC; Note 2
Serial Data Out
Serial Clock Out
Negative Supply Voltage; Note 2
Positive Supply Voltage for the analog circuitry and CML Output buffer; Note 2
Inverted Differential Output. Note 1.
Non-inverted Differential Output. Note 1
Positive Supply Voltage for the analog circuitry and CML Output buffer; Note 2
When the SLOAD pin is LOW or left open (has internal pull-down resistor), the output of the
shift register will input the 4-bit DAC and set the EQEN bit. When HIGH, the input to the 4-
bit DAC is locked to the state prior to when SLOAD went HIGH.
Serial Clock In; pin will default LOW when left open (has internal pull-down resistor)
Serial Data In; pin will default LOW when left open (has internal pull-down resistor)
Positive Supply Voltage for the analog circuitry and CML Output buffer; Note 2
The Exposed Pad (EP) on the QFN-16 package bottom is thermally connected to the die for
improved heat transfer out of package. The exposed pad must be attached to a heat-sinking
conduit. The pad is also electrically connected to the die, and is recommended to be
electrically and thermally connected to GND on the PC board.
Internal 50-Ω Termination Pin for IN and INb
16
5
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NB7VPQ16M
15
6
FTEN VCC
PE1
14
7
VCC
2
T
3
) is connected to a common termination voltage or left open, and if no
VEE
13
8
9
12
11
10
9
VCC
VCC
Q
Qb
VEE
Description
Exposed Pad
Publication Order Number:
NB7VPQ16M/D