pca2125 NXP Semiconductors, pca2125 Datasheet - Page 21

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pca2125

Manufacturer Part Number
pca2125
Description
Spi Real Time Clock / Calendar Semiconductors
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PCA2125_00
Preliminary data sheet
6.7.2 Countdown timer interrupts
The timing shown for clearing MSF in
mode i.e. when TI/TP = 0, where the pulse may be shortened by setting both MI and SI to
‘0’.
Generation of interrupts from the countdown timer is controlled via the TIE bit (see
Table
The pulse generator for the countdown timer interrupt also uses an internal clock, but this
time it is dependent on the selected source clock for the countdown timer and on the
countdown value, n. As a consequence, the width of the interrupt pulse varies (see
Table
Table 36.
[1]
If the TF flag is clear before the end of the INT pulse, then the INT pulse is shortened. This
allows the source of a system interrupt to be cleared immediately it is serviced i.e. the
system does not have to wait for the completion of the pulse before continuing (see
Figure
Source clock (Hz)
4096
64
1
1⁄60
Fig 13. Example of shortening the INT pulse by clearing the MSF flag.
n = loaded countdown value. Timer stopped when n = 0.
25).
36).
14). Instructions for clearing MSF can be found in
INT operation (bit TI / TP = 1)
seconds counter
instruction
Rev. 00.11 — 30 January 2007
MSF
SCL
INT
INT period (s)
n = 1
1⁄8192
1⁄128
1⁄64
1⁄64
58
59
Figure 13
CLEAR INSTRUCTION
is also valid for the non-pulsed interrupt
Section
[1]
SPI Real time clock / calendar
8th clock
n > 1
1⁄4096
1⁄64
1⁄64
1⁄64
6.6.3.
001aaf908
PCA2125
© NXP B.V. 2007. All rights reserved.
(1)
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