pca2125 NXP Semiconductors, pca2125 Datasheet - Page 14

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pca2125

Manufacturer Part Number
pca2125
Description
Spi Real Time Clock / Calendar Semiconductors
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PCA2125_00
Preliminary data sheet
6.5.1 Alarm flag
Generation of interrupts from the alarm function is described under the interrupt section,
Section
When all enabled comparisons first match, the Alarm Flag (AF) is set. AF will remain set
until cleared by software. Once AF has been cleared it will only be set again when the
time increments to match the alarm condition once more. Alarm registers which have their
bit AEn at logic 1 are ignored.
Figure 9
the flags is made by a write command, therefore bits 7,6,4,1 and 0 must be written with
their previous values. Repeatedly re-writing these bits has no influence on the functional
behavior.
To prevent the timer flags being overwritten while clearing AF, a logic AND is performed
during a write access. Writing a ‘1’ will cause the flag to maintain it’s value, whilst writing a
‘0’ will cause the flag to be reset.
Table 23:
The following tables show what instruction must be sent to clear the AF. In this example,
MSF and TF are unaffected.
Table 24:
Register
Control 2
Register
Control 2
Fig 9. AF timing
6.7.3.
Example where only the minute alarm is used and no other interrupts are enabled.
shows an example for clearing AF but leaving MSF and TF unaffected. Clearing
Flag location in control 2
Example to clear only TF (bit 2)
Bit 7
-
Bit 7
-
INT when AIE = 1
minutes counter
minute alarm
Rev. 00.11 — 30 January 2007
Bit 6
-
Bit 6
-
AF
44
45
Bit 5
MSF
Bit 5
1
Bit 4
-
Bit 4
-
45
Bit 3
AF
Bit 3
0
SPI Real time clock / calendar
Bit 2
TF
Bit 2
1
001aaf903
PCA2125
46
© NXP B.V. 2007. All rights reserved.
Bit 1
-
Bit 1
-
Bit 0
-
Bit 0
-
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