ics1574b Integrated Device Technology, ics1574b Datasheet - Page 7

• Manufacturer Part Number: ics1574b
• Description: User Programmable Laser Engine Pixel Clock Generator
• Manufacturer: Integrated Device Technology

IDT™ / ICS™ User Programmable Laser Engine Pixel Clock Generator
ICS1574B
User Programmable Laser Engine Pixel Clock Generator
Register Mapping — ICS1574B
NOTE:
automatically generate all register values based on requirements. Contact factory for details.
BIT(S)
1 – 4
5, 6
7
8
9
10
11, 12
13 – 14
It is not necessary to understand the function of these bits to use the ICS1574B. PC Software is available from ICS to
BIT REF.
PCLK[0]..PCLK[3]
Reserved
Reserved
SELXTAL
Reserved
Reserved
Reserved
S[0]..S[1]
Sets PCLK divider modulus according to this table.
PLL post-scaler / test mode select bits.
DESCRIPTION
These bits are set to implement a divide-by-four on power-up.
Must be set to 0.
Must be set to 1.
Normally set to 0. When set to logic 1, passes the reference
frequency to the post-scaler instead of the PLL output
(defaults to 1 on power-up).
Must be set to 0.
Must be set to 1.
Must be set to 0.
(X =
P
[ S
C
0
0
1
1
] 1
L
Don't Care
0
0
0
0
0
0
0
0
1
1
1
1
K
[
] 3
[ S
0
0
7
1
1
7
] 0
P
)
C
P
d
P
P
P
P
A
P
v i
s o
s o
C
s o
C
C
L
U
X
X
X
X
0
0
0
0
L
L
L
1
1
1
1
d i
X
K
s - t
s - t
s - t
K
K
K
r e
E -
[
a c
a c
a c
] 2
d
d
u o
N
i r d
r e l
r e l
v i
r e l
v i
p t
d i
d i
T
e v
. t u
E
=
=
=
r e
r e
t s
P
S
1
2
4
T
C
i r d
i r d
F .
F .
F .
e h
M
L
e v
e v
C (
C (
C (
0
0
0
0
0
0
1
1
1
1
1
1
P
K
O
C
t s
t s
L
L
L
D
[
L
) K
) K
) K
] 1
e h
e h
. E
D
K
E
=
u o
=
=
T
P
P
S
C
C
e h
F
F
F
C
p t
P
L
L
P (
P (
P (
R
. t u
K
K
A
C
L
L
L
P I
U
L
L
) L
u o
) L
u o
X
0
0
0
0
0
0
1
1
1
1
1
1
T
. )
K
. 2 /
. 4 /
p t
p t
P _
O I
T
[
. t u
. t u
] 0
C
e h
N
T
T
L
e h
e h
K
o
ICS1574B
t u
o
o
t i b
u p
t u
t u
M
u p
u p
o t
i r d
O
o t
o t
t f
1
e v
1
D
( 4
( 4
( 8
( 8
( 6
( 6
2
t f
t f
1
1
e h
t s
3
5
6
U
) b
0
) a
) a
) b
0
2
e h
e h
) a
) b
e h
L
P
C
U
L
S
K
ICS1574B
TSD