ics1574b Integrated Device Technology, ics1574b Datasheet - Page 6

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ics1574b

Manufacturer Part Number
ics1574b
Description
User Programmable Laser Engine Pixel Clock Generator
Manufacturer
Integrated Device Technology
Datasheet

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IDT™ / ICS™ User Programmable Laser Engine Pixel Clock Generator
ICS1574B
User Programmable Laser Engine Pixel Clock Generator
ICS1574B
Power Supplies and Decoupling
The ICS1574B has two VSS pins to reduce the effects of
package inductance. Both pins are connected to the same
potential on the die (the ground bus). BOTH of these pins
should connect to the ground plane of the PCB as close to
the package as is possible.
The ICS1574B has a VDDO pin which is the supply of +5
volt power to the output driver. This pin should be con-
nected to the power plane (or bus) using standard
high-frequency decoupling practice. That is, capacitors
Figure 4
6
6
should have low series inductance and be mounted close to
the ICS1574B.
The VDD pin is the power supply pin for the PLL synthe-
sizer circuitry and other lower current digital functions.
We recommend that RC decoupling or zener regulation be
provided for this pin (as shown in the recommended appli-
cation circuitry). This will allow the PLL to “track”
through power supply fluctuations without visible effects.
See Figure 4 for typical external circuitry.
ICS1574B
TSD

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