ics9248-56 ETC-unknow, ics9248-56 Datasheet
ics9248-56
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ics9248-56 Summary of contents
Page 1
... Circuit Systems, Inc. Frequency Timing Generator for Pentium II Systems General Description The ICS9248-56 is the Main clock solution for Notebook designs using the Intel 440BX style chipset. Along with an SDRAM buffer such as the ICS9179-03, it provides all necessary clock signals for such a system. ...
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... ICS9248-56 Pin Descriptions Pin number Pin name 1 GNDREF PCICLK_F 5,6,9,10,11 PCICLK (1:5) 7 GNDPCI 8 VDDPCI 12 VDD48 13 48 MHz 14 TS#/48/24MHz 15 GND48 16 SEL 100/66# 17 PD# 18 CPU_STOP# 19 VDD 20 PCI-Stop# 21 GND 22 GNDL 23,24 CPUCLK(1:0) 25 VDDL 26 SPREAD# 27 REF0/SEL48# 28 VDDREF Type Power Ground for 14.318 MHz reference clock outputs Input 14 ...
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... PD# pin will not cause clocks of a short or longer pulse than that of the running clock. The first clock pulse coming out of a stopped clock condition may be slightly distorted due to clock network charging circuitry. Board routing and signal loading may have a large impact on the initial clock distortion also. ICS9248-56 Power Management Requirements ...
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... PD# and PCI_STOP# are shown in a high (true) state. PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-56 used to turn off the PCICLK (0:4) clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-56 internally. The minimum that the PCICLK (0:4) clocks are enabled (PCI_STOP# high pulse least 10 PCICLK (0:4) clocks ...
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... The power down selection is used to put the part into a very low power state without turning off the power to the part. PD asynchronous active low input. This signal is synchronized internally by the ICS9248-56 prior to its control action of powering down the clock synthesizer. Internal clocks will not be running after the device is put in power down state. When PD# is active (low) all clocks are driven to a low state and held prior to turning off the VCOs and the crystal oscillator ...
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... ICS9248-56 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...
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... L CONDITIONS ICS9248-56 MIN TYP MAX UNITS 1.8 2.3 V 0.31 0 0.4 1.15 1.6 ns 0.4 1.4 1 134 175 ps 186 250 ps 52 150 ps -250 150 +250 ps MIN ...
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... ICS9248-56 Electrical Characteristics - REF/48MHz/24MHz 70C 3.3 V +/-5 DDL PARAMETER SYMBOL Output High Voltage V OH5 Output Low Voltage V OL5 Output High Current I OH5 Output Low Current I OL5 1 Rise Time Fall Time Duty Cycle Jitter t jabs5 ...
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... All clock outputs should have series terminating resistor. Not shown in all places to improve readibility of diagram 2 Optional EMI capacitor should be used on all CPU, SDRAM, and PCI outputs. 3 Optional crystal load capacitors are recommended. Capacitor Values: C1 Crystal load values determined by user All unmarked capacitors are 0.01 F ceramic 9 ICS9248-56 ...
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... ICS9248-56 Ordering Information ICS9248F-56 Example: ICS XXXXy F - PPP Pattern Number ( digit number for parts with ROM code patterns) Package Type F=SSOP Revision Designator Device Type (consists digit numbers) Prefix ICS Standard Device SYMBOL In Millimeters COMMON DIMENSIONS MIN MAX ...
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... ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to 11 obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. ICS9248-56 In Millimeters In Inches COMMON DIMENSIONS COMMON DIMENSIONS ...