ics9248-157 ETC-unknow, ics9248-157 Datasheet
ics9248-157
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ics9248-157 Summary of contents
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... ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is ICS9248-157 1 28 VDDR 2 27 REF1/FS0* ...
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... Advance Information General Description The ICS9248-157 is the Main clock solution for Notebook designs using the Intel ALI1621/1632M style chipset. Along with an SDRAM buffer such as the ICS9179-03, it provides all necessary clock signals for such a system. Spread spectrum may be enabled by driving pin 26, SPREAD# active (Low) at power-on. Spread spectrum typically reduces system EMI by 8dB to 10dB ...
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... ICS9248-157 ...
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... ICS9248-157 Advance Information Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...
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... CONDITIONS ICS9248-157 MIN TYP MAX UNITS 2 2.3 V 0.2 0.4 V -41 - 0.99 1.6 ns 1. 175 ps 203 250 ps 150 ps -250 +250 ps MIN TYP MAX UNITS 2 ...
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... ICS9248-157 Advance Information Electrical Characteristics - REF/48MHz 70C 2.5V+/-5 DDL DD PARAMETER SYMBOL Output High Voltage V OH5 Output Low Voltage V OL5 Output High Current I OH5 Output Low Current I OL5 1 Rise Time Fall Time Duty Cycle Jitter, One Sigma ...
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... The programming resistors should be located close to the series termination resistor to minimize the current loop area more important to locate the series termination resistor close to the driver than the programming resistor. Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig ICS9248-157 ...
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... CPUSTOP asychronous input to the clock synthesizer used to turn off the CPUCLKs for low power operation. CPU_STOP# is synchronized by the ICS9248-157. The minimum that the CPUCLK is enabled (CPU_STOP# high pulse) is 100 CPUCLKs. All other clocks will continue to run while the CPUCLKs are disabled. The CPUCLKs will always be stopped in a low state and start in such a manner that guarantees the high pulse width is a full pulse ...
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... PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-157 used to turn off the PCICLK clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-157 internally. The minimum that the PCICLK clocks are enabled (PCI_STOP# high pulse least 10 PCICLK clocks. PCICLK clocks are stopped in a low state and started with a full high pulse width guaranteed ...
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... The power down selection is used to put the part into a very low power state without turning off the power to the part. PD asynchronous active low input. This signal is synchronized internally by the ICS9248-157 prior to its control action of powering down the clock synthesizer. Internal clocks will not be running after the device is put in power down state. When PD# is active (low) all clocks are driven to a low state and held prior to turning off the VCOs and the crystal oscillator ...
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... Pattern Number ( digit number for parts with ROM code patterns) Package Type F=SSOP Revision Designator (will not correlate with datasheet revision) Device Type (consists digit numbers) Prefix ICS Standard Device Third party brands and names are the property of their respective owners. ICS9248-157 SY MBOL In Millimeters COMMON DIMENSIONS MIN ...