ics8745b-21 Integrated Device Technology, ics8745b-21 Datasheet - Page 8

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ics8745b-21

Manufacturer Part Number
ics8745b-21
Description
1 1 Differential-to-lvds Zero Delay Clock Generator
Manufacturer
Integrated Device Technology
Datasheet
Parameter Measurement Information
3.3V LVDS Output Load AC Test Circuit
Phase Jitter and Static Phase Offset
Cycle-to-Cycle Jitter
IDT™ / ICS™ LVDS ZERO DELAY CLOCK GENERATOR
ICS8745B-21
1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
FB_IN
FB_IN
POWER SUPPLY
CLK
+
CLK
Q
Float GND
Q
3.3V±5%
tjit(Ø) = ⏐ t(Ø) – t(Ø) mean⏐ = Phase Jitter
t(Ø)
(where t(Ø) is any random sample, and t(Ø)
average of the sampled cycles measured on controlled edges)
mean
t(Ø)
= Static Phase Offset
tcycle n
tjit(cc) = tcycle n – tcycle n+1
V DDO
V DDA,
V DD,
1000 Cycles
LVDS
tcycle n+1
mean
nQx
Qx
is the
SCOPE
V
V
V
V
OH
OL
OH
OL
8
Differential Input Level
Output Skew
Output Rise/Fall Time
Clock
Outputs
Qy
Qy
Qx
Qx
GND
V DD
CLK
CLK
20%
V
PP
tsk(o)
80%
t
R
ICS8745BM-21REV. C OCTOBER 27, 2008
Cross Points
80%
t
F
V
CMR
20%
V
OD

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