ics8745b-21 Integrated Device Technology, ics8745b-21 Datasheet - Page 7

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ics8745b-21

Manufacturer Part Number
ics8745b-21
Description
1 1 Differential-to-lvds Zero Delay Clock Generator
Manufacturer
Integrated Device Technology
Datasheet
AC Electrical Characteristics
Table 6. AC Characteristics, V
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as the time difference between the input reference clock and the averaged feedback input signal across all conditions,
when the PLL is locked and the input reference frequency is stable.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 4: Phase jitter is dependent on the input source used.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 6: Characterized at VCO frequency of 622MHz.
NOTE 7: Measured from the 20% to 80% points. Guaranteed by characterization. Not production tested.
IDT™ / ICS™ LVDS ZERO DELAY CLOCK GENERATOR
Parameter Symbol
f
t
tsk(Ø)
tsk(o)
tjit(cc)
tjit(θ)
t
t
odc
MAX
PD
L
R
ICS8745B-21
1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
/ t
F
Output Frequency
Propagation Delay; NOTE 1
Static Phase Offset; NOTE 2, 5
Output Skew; NOTE 3, 5
Cycle-to-Cycle Jitter; NOTE 5, 6
Phase Jitter; NOTE 4, 5, 6
PLL Lock Time
Output Rise/Fall Time; NOTE 7
Output Duty Cycle
DD
= V
DDA
= V
DDO
= 3.3V ± 5%, T
PLL_SEL = 0V, f ≤ 700MHz
Test Conditions
PLL_SEL = 3.3V
20% to 80%
7
A
= 0°C to 70°C
Minimum
-100
200
3.1
46
ICS8745BM-21REV. C OCTOBER 27, 2008
Typical
3.4
25
50
Maximum
150
±52
700
700
4.0
35
30
54
1
Units
MHz
ms
ns
ps
ps
ps
ps
ps
%

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